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f8459f2478
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Hardware CRC32 engine in matmul IP: 4-byte/cycle combinational, register at 0x010
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2026-06-25 20:40:08 +08:00 |
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76b5f30c6b
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Move MATMUL_DONE to last line
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2026-06-25 20:11:45 +08:00 |
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d9483a9d39
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Add timing instrumentation for profiling (prologue/loop/epilogue/crc32)
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2026-06-25 20:10:31 +08:00 |
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956cd67773
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Interrupt-driven wait: matmul HWI2 + DMA HWI1 direct CPU lines
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2026-06-25 20:03:53 +08:00 |
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57ba5d271d
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Remove all debug and printf
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2026-06-25 15:44:18 +08:00 |
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b331301584
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Fix SRAM model: level-sensitive write for burst support
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2026-06-25 15:40:28 +08:00 |
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a24b5cff6e
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Add for writes to result region (addr 320-399)
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2026-06-25 15:31:28 +08:00 |
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a9958ee4fa
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BURST_LEN 47->63 (64 beats)
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2026-06-25 04:08:18 +08:00 |
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4aba830a7d
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Add for B1_C read channel
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2026-06-25 04:04:18 +08:00 |
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3cad98a811
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Increase BURST_LEN to 47 (48 beats) to cover 192-byte C reads in one burst
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2026-06-25 03:54:10 +08:00 |
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b5ec0d2926
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Fix escaped quotes in display
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2026-06-25 03:45:18 +08:00 |
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9c6b321d59
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Add in read channel to debug C register readback
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2026-06-25 03:44:54 +08:00 |
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3fb93131e5
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Simplify ACCUM debug: show expression value only
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2026-06-25 03:43:46 +08:00 |
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86eab428a7
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Use parenthesized pairwise addition to prevent synthesis truncation
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2026-06-25 03:41:58 +08:00 |
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fba86b01a8
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Add in C_ACCUM to debug accumulation sum
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2026-06-25 03:38:26 +08:00 |
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4e409f870c
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Register mult_p before accumulation to prevent synthesis glitches
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2026-06-25 03:27:51 +08:00 |
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6c77fa2e38
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Remove FFT controller, tie off slave 6
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2026-06-25 03:16:40 +08:00 |
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d9d03b16c6
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Fix: wait for ALL 4 multipliers to finish before accumulation
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2026-06-25 03:07:49 +08:00 |
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54aa37adee
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Add debug output for C[0][0]/C[1][1]/C[2][3] of groups 0,1
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2026-06-25 03:03:10 +08:00 |
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2e5d793bbf
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Merge main (CRC32 fix)
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2026-06-25 02:52:09 +08:00 |
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9ecda4aa7a
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Fix CRC32 table, remove debug output
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2026-06-25 02:51:36 +08:00 |
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ae8f2d1c2d
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Merge main (AXI ports fix) into no-fft
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2026-06-25 02:35:04 +08:00 |
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a2b3f72c76
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Fix matmul AXI: add missing awlock/cache/prot ports, remove placeholder
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2026-06-25 02:34:50 +08:00 |
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8e86d8693e
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Increase DMA FIFO depth to 128 (512 bytes) for burst support
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2026-06-25 01:54:07 +08:00 |
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1e36883a7c
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Fix CRC32 table entry 187
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2026-06-25 01:26:53 +08:00 |
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3962058592
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Fix CRC32 table entry 187 again (0x5CB30A04 -> 0x5CB36A04)
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2026-06-25 01:24:04 +08:00 |
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31c2b53583
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CRC32 on-the-fly from c_buf (bypass GCC volatile ExtRAM bug)
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2026-06-25 01:19:57 +08:00 |
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292d3c7abf
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Remove placeholder comment
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2026-06-25 00:53:42 +08:00 |
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d3e1b5fda4
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Add missing AXI4 ports: awlock/awcache/awprot/arlock/arcache/arprot
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2026-06-25 00:53:28 +08:00 |
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828612164a
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Re-remove FFT module (leaked in from main merge)
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2026-06-25 00:51:54 +08:00 |
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acb158a392
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Update matmul RTL, remove shift_add_mult.v
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2026-06-25 00:47:43 +08:00 |
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5e467175ea
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Merge main (user mods) into no-fft
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2026-06-25 00:44:01 +08:00 |
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641d055f18
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User mods: matmul RTL + shift_add_mult + C program
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2026-06-25 00:43:16 +08:00 |
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99c85f1a20
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Rewrite burst logic with FFT-style state machine (W_IDLE/DATA/RESP, R_IDLE/DATA)
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2026-06-25 00:22:30 +08:00 |
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27d818390f
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Remove assign s_axi_rlast (now procedural)
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2026-06-25 00:18:09 +08:00 |
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494b8b9c5b
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Fix: s_axi_rlast must be output reg (assigned in always block)
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2026-06-25 00:16:36 +08:00 |
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f05c445ef3
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Sync matmul IP (burst support) from no-fft
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2026-06-25 00:12:02 +08:00 |
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d5ad070ca0
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Restore FFT module on main branch
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2026-06-25 00:10:42 +08:00 |
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20d5a541ad
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Add burst write/read support to matmul AXI slave for DMA compatibility
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2026-06-25 00:08:29 +08:00 |
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1660b283c4
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Move DMA files to asm/, remove from common.mk
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2026-06-24 23:52:30 +08:00 |
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5459538a04
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Add dma.c to common.mk link list
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2026-06-24 23:47:33 +08:00 |
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5dcee80b95
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DMA-driven: A+B+C per group via DMA ch0/ch1, -O2 CRC32 from ExtRAM
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2026-06-24 23:46:58 +08:00 |
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a42568f635
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Clean production code: -O2, read CRC32 from ExtRAM, remove all debug
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2026-06-24 23:42:35 +08:00 |
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c1fcb3c796
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CRC32 on-the-fly from c_buf — bypass ExtRAM reads entirely
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2026-06-24 23:38:06 +08:00 |
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07f8422d75
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Fix CRC32 table entry 187: 0x5CB30A04 -> 0x5CB36A04
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2026-06-24 23:32:24 +08:00 |
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93361733f6
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Definitive write test: write 0xDEADBEEF then read back
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2026-06-24 23:29:00 +08:00 |
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16c0d7b639
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Use __sync_synchronize() hardware barrier instead of asm compiler barrier
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2026-06-24 23:22:38 +08:00 |
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f0ebf1f5fa
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Output A0/B0/C0 for groups 0-3 and N-2,N-1
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2026-06-24 23:16:26 +08:00 |
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2c8f5d37f3
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Add asm memory barrier before CRC32 to flush write buffer
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2026-06-24 23:09:06 +08:00 |
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afef1f1433
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Add group 1 A/B/C debug output
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2026-06-24 23:03:46 +08:00 |
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