8 Commits

Author	SHA1	Message	Date
FallenSigh	f735f789d6	remove dsp usage	2026-07-04 21:20:32 +08:00
FallenSigh	d3a08b1f9d	Split CDMA matmul endpoint engines	2026-07-04 20:42:31 +08:00
FallenSigh	2725f6eb57	Reduce CDMA matmul bridge request latency	2026-07-04 20:12:45 +08:00
FallenSigh	27cdfb713a	Optimize CDMA matmul bridge scheduling	2026-07-04 19:59:49 +08:00
FallenSigh	c37f493bcb	Compute matmul CRC before result store	2026-07-04 19:45:22 +08:00
FallenSigh	bf6051c8c6	Add standalone CDMA matmul bridge	2026-07-04 19:35:42 +08:00
FallenSigh	b7553418fa	Add direct CDMA matmul path	2026-07-04 19:15:34 +08:00
FallenSigh	fbc993b846	Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC	2026-06-23 01:22:45 +08:00