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db9997b473
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Pipelined multiplier: 3-stage LUT-based replaces shift_add, FSM simplified to 2-state
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2026-06-25 22:09:20 +08:00 |
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f8459f2478
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Hardware CRC32 engine in matmul IP: 4-byte/cycle combinational, register at 0x010
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2026-06-25 20:40:08 +08:00 |
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a42568f635
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Clean production code: -O2, read CRC32 from ExtRAM, remove all debug
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2026-06-24 23:42:35 +08:00 |
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