fallensigh
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  • Joined on 2026-05-26
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fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-30 03:18:42 +08:00
2fb1cd67e3 revert comp_decomp_sync.v
fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-30 02:49:47 +08:00
b7eb59fb5b add design report and timing analysis report
faf15ee113 docs: 新增 mlkem_top RTL 结构图 (SVG)
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fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-30 01:17:09 +08:00
717a9929b6 fix(rtl,scripts): replace combinational divider with Barrett multiplication, add synthesis include_dirs, set 50MHz clock
fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-29 23:24:20 +08:00
ebf1182b6d fix(scripts): add missing RTL files to create_project.tcl, switch default sim to hello_world
92dafc9696 fix(rtl): add use_dsp="no" attributes, fix duplicate wire declaration
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fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-29 23:11:14 +08:00
ffe2e1e0c8 delete image.png
fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-29 23:09:15 +08:00
f22165d29e chore: gitignore + untrack AI agent tooling (.claude/.opencode/.trellis/AGENTS.md)
5ac7a59289 chore: 删除无用的 mod_add 模块
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fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-29 22:48:43 +08:00
971ce97d50 chore: 删除无用测试文件与 ml-kem-r 痕迹
fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-29 22:38:30 +08:00
df4d5cd572 refactor: 把 run_hello.sh 合并进 run_tb.sh 的 'hello' 模块
fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-29 22:27:55 +08:00
6b99e5abba docs: 重写 README，覆盖 KeyGen/Encaps/Decaps 全功能微架构与 mlkem_top I/O
fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-29 22:21:29 +08:00
ee2bf1cda8 test(top): two-instance hello_world TB (genenc + dec split)
f27922270a test(top): hardware hello_world TB (full KeyGen+Encaps+Decaps protocol)
2b70431923 feat(dec): Decaps D7 - implicit-reject compare + end-to-end KAT
a734eb2cad feat(dec): Decaps D6 - c' = K-PKE.Encrypt(ek_pke, m', r')
189411e8d1 feat(dec): Decaps D5 - (K',r')=G(m'||h) + K-bar=J(z||c)
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fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-29 16:05:35 +08:00
e46d2258d9 chore(tb): remove Verilator TBs + framework; parallelize XSIM runs
030931d4e5 feat(dec): Decaps D0 - op_i widen + dk/c load + parse
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fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-29 12:43:36 +08:00
4091fd0676 chore(enc): merge run_enc.sh into run_tb.sh; TB dumps hardware ct
fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-29 11:21:15 +08:00
7228bebb78 feat(enc): Encaps E7 - c2 = byteEncode_dv(Compress_dv(v)) + end-to-end KAT
e114bec5ee feat(enc): Encaps E6 - v = INTT(sum t_hat o y_hat) + e2 + mu
4fee8bded3 fix(enc): compile comp_decomp_sync + pipeline_reg in KeyGen tcl
3bc46f9640 feat(enc): Encaps E5 - c1 = byteEncode_du(Compress_du(u))
ee875d2ff7 feat(enc): Encaps E4 - u = INTT(sum A^T o y_hat) + e1
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fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-29 00:01:03 +08:00
c4669480d1 test(top): add ml-kem-r cross-validation script (xcheck_mlkemr.py)
fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-28 23:13:09 +08:00
af9ecb20b7 test(top): dump KeyGen d/z inputs and ek/dk outputs per case
a38c41a1f5 refactor(kg): bank_se -> sd_bram instance; Phase 2 complete (polymem all BRAM)
5cfe8c74ca refactor(kg): bank_t -> sd_bram instance (1R+1W RMW, real BRAM)
d1b409f65f refactor(kg): bank_a -> sd_bram instance (1R+1W, real BRAM)
4afa3a4998 refactor(kg): registered single-port read for ST_E byteEncode (bank_se/bank_t)
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fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-28 17:14:58 +08:00
0fa7f48ed4 build(vivado): add sd_bram to create_project.tcl, fix run instructions
f4493966ac test(top): stream raw xsim output to terminal (tee to log)
74d8f021c9 test(top): add fast single-K / single-case runner to run_tb.sh
75c350c1e4 refactor(kg): registered read-ahead for ST_M accumulate (bank_se/bank_t)
9c08273c5f refactor(kg): registered read-ahead for ST_M load (bank_a + bank_se)
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fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-28 15:43:55 +08:00
4f46c1cd02 build(vivado): point create_project.tcl at shared keccak_core variants
460a6ed70c refactor(kg): share a single keccak_core across G/H, SampleNTT, CBD (4->1)
851630f73c refactor(kg): merge G/H into single shared sha3_top (4->3 keccak_core)
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fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-28 15:07:32 +08:00
5a7d5d6a47 refactor(kg): move ek/dk_pke byte storage into BRAM (sd_bram)
fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-28 03:49:42 +08:00
8774e03a0e build(vivado): rewrite create_project.tcl for current KeyGen flow
3a53993754 refactor(kg): make ML-KEM K a runtime input k_i instead of a parameter
b7e4fd9323 test(top): add kat_k2_* vectors with uniform prefix for parametric TB
b2bf798454 feat(mlkem_top): parameterize K in {2,3,4} (ML-KEM 512/768/1024)
2f46c0790f test(top): add xsim_run.tcl so run_tb.sh top runs KeyGen KAT 0..4
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fallensigh pushed to main at fallensigh/mlkem-sync 2026-06-27 03:54:04 +08:00
5d86000231 add docs and test data