build(vivado): point create_project.tcl at shared keccak_core variants
Match the sim flow: use sha3_top_shared + sample_*_sync_shared so the Vivado project synthesises the single-keccak_core datapath.
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@@ -36,11 +36,11 @@ set_property target_simulator XSim [current_project]
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# ── SHA3 / Keccak ──
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read_verilog -sv ${PROJECT_DIR}/sync_rtl/sha3/keccak_round.v
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read_verilog -sv ${PROJECT_DIR}/sync_rtl/sha3/keccak_core.v
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read_verilog -sv ${PROJECT_DIR}/sync_rtl/sha3/sha3_top.v
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read_verilog -sv ${PROJECT_DIR}/sync_rtl/sha3/sha3_top_shared.v
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# ── 采样 ──
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read_verilog -sv ${PROJECT_DIR}/sync_rtl/sample_ntt/sample_ntt_sync.v
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read_verilog -sv ${PROJECT_DIR}/sync_rtl/sample_cbd/sample_cbd_sync.v
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# ── 采样(共享 keccak_core 变体)──
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read_verilog -sv ${PROJECT_DIR}/sync_rtl/sample_ntt/sample_ntt_sync_shared.v
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read_verilog -sv ${PROJECT_DIR}/sync_rtl/sample_cbd/sample_cbd_sync_shared.v
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# ── NTT ──
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read_verilog -sv ${PROJECT_DIR}/sync_rtl/ntt/barrett_mul.v
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