ciciec2026

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FallenSigh e30a65bd72 perf(mlkem): pipeline CBD->bank write to cut 100 MHz critical path

At 100 MHz the worst path (WNS -1.58 ns) was CBD sample: squeeze_buf[buf_ptr]
extraction -> CBD add/sub -> mod-Q -> bank_t/bank_se write, all combinational
in one cycle and routing-dominated (squeeze_buf and the banks place far apart).
Register the CBD write (data/addr/enable) so the bank write commits one cycle
later; the registered write takes priority in the bank_se/bank_t mux so the
1-cycle spillover into the next state uses the correct addr/data. No consumer
reads these coeffs until the following stage (>1 cycle later), so no RAW hazard.

Verified byte-exact vs NIST KAT: Encaps 9/9, Decaps 9/9, KeyGen 11/11,
hello_world e2e -- all PASS.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

2026-07-11 07:42:35 +08:00

doc

doc: add ML-KEM IP design report with figures

2026-07-08 04:42:11 +08:00

fpga

update vivado reports

2026-07-08 04:20:27 +08:00

rtl

perf(mlkem): pipeline CBD->bank write to cut 100 MHz critical path

2026-07-11 07:42:35 +08:00

sdk

add examples/mlkem_hello