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FallenSigh cd039e2e2e mlkem_test: add mlkem-native

2026-07-05 21:26:19 +08:00

doc

doc(mlkem): add mlkem user guide

2026-06-30 15:23:13 +08:00

fpga

Track .xci/.xcix/.xdc as source files; drop Vivado-generated stubs/netlists

2026-06-23 01:33:56 +08:00

rtl

feat: add prng

2026-07-05 21:04:25 +08:00

sdk

mlkem_test: add mlkem-native

2026-07-05 21:26:19 +08:00

sim

update test data and remove mif files

2026-07-05 20:16:13 +08:00

tools

update test data and remove mif files

2026-07-05 20:16:13 +08:00

.gitignore

update test data and remove mif files

2026-07-05 20:16:13 +08:00

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193 MiB

Languages

Verilog 46.5%

C 27.8%

Assembly 20.5%

SystemVerilog 3.3%

Python 0.7%

Other 1.2%