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f0ebf1f5fa
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Output A0/B0/C0 for groups 0-3 and N-2,N-1
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2026-06-24 23:16:26 +08:00 |
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2c8f5d37f3
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Add asm memory barrier before CRC32 to flush write buffer
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2026-06-24 23:09:06 +08:00 |
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afef1f1433
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Add group 1 A/B/C debug output
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2026-06-24 23:03:46 +08:00 |
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23bb112586
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Print CRC32 loop counter to verify iteration count
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2026-06-24 23:01:29 +08:00 |
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8ea98874a5
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Inline CRC32 computation into main (bypass function call)
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2026-06-24 22:52:08 +08:00 |
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d27e147652
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Fix escaped quotes
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2026-06-24 22:50:14 +08:00 |
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f6146bd467
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Minimal debug: CRC32 self-test + group 0 rdback in one line
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2026-06-24 22:49:06 +08:00 |
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e39a655861
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Add CRC32 self-test debug output
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2026-06-24 22:42:46 +08:00 |
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bbd3e3358b
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Fix extra brace in debug code
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2026-06-24 22:38:18 +08:00 |
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3269e83d68
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Debug: check ExtRAM write-back at start/mid/end of range
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2026-06-24 22:36:29 +08:00 |
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4a67ca5c83
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Add debug output for group 0 write-back and group 1 compute
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2026-06-24 22:09:06 +08:00 |
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aaefb04737
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Sync asm/ (user-sample.c + Makefile) from test branch
MATMUL_GROUP_NUM defaults to 5000, overridable for fast local testing.
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2026-06-24 17:01:45 +08:00 |
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fbc993b846
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Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
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2026-06-23 01:22:45 +08:00 |
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