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157 Commits 5 Branches 1 Tag
62a4e07037a88731ea9c9f515ae39988b1f01960
Commit Graph

13 Commits

Author SHA1 Message Date
FallenSigh
fe20f28a72 update system design report 2026-07-15 11:09:57 +08:00
FallenSigh
d45646342b test: add board FFT validation and VCD capture 2026-07-15 04:13:15 +08:00
FallenSigh
2359e7976c docs: rebuild system report and test workflow 2026-07-15 03:48:19 +08:00
FallenSigh
1b51f28263 doc: add backend design report with screenshots 2026-07-13 08:23:34 +08:00
FallenSigh
82f3c3d700 doc: reorganize reports into mlkem_ip/ and system/ directories 2026-07-13 06:48:50 +08:00
FallenSigh
7b990966e0 doc: update system design report with figures, tables, and test results 2026-07-13 05:26:09 +08:00
FallenSigh
6d4239ea7f doc: update ML-KEM IP report (NTT architecture, clock, compares) and system design report 2026-07-12 01:33:31 +08:00
FallenSigh
1d7e974c28 doc: update ML-KEM IP design report with latest timing and test data 2026-07-11 10:10:18 +08:00
FallenSigh
ab4751bfd3 doc: add ML-KEM IP design report with figures 2026-07-08 04:42:11 +08:00
FallenSigh
94f8f443d3 add mlkem test results 2026-07-08 03:18:19 +08:00
FallenSigh
0c85a20b4e mlkem test diagnostics and allocator updates 2026-07-08 02:35:56 +08:00
FallenSigh
3d39fc2f5e doc(mlkem): add mlkem user guide 2026-06-30 15:23:13 +08:00
FallenSigh
fbc993b846 Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC 2026-06-23 01:22:45 +08:00
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