fallensigh/ciciec2026
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matmul-crc-only
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2 Commits

Author SHA1 Message Date
FallenSigh
fe8eff0aa0 Track .xci/.xcix/.xdc as source files; drop Vivado-generated stubs/netlists 2026-06-23 01:33:56 +08:00
FallenSigh
fbc993b846 Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC 2026-06-23 01:22:45 +08:00