FallenSigh c4cd10c2c1 feat(ntt): implement synchronous NTT core with Barrett modular reduction ...

Phase 2.1: Merged Path00+Path01 NTT engine.
- barrett_mul.v: Barrett modular multiplication (a·b mod 3329)
- butterfly_unit.v: Cooley-Tukey/Gentleman-Sande butterfly
- zeta_rom.v: 128-entry ROM with bit-reversed roots of unity
- ntt_core.v: 7-layer NTT FSM, 256×12-bit register file
- ntt_sync.v: valid/ready streaming wrapper

Verified: 13/13 vectors bit-exact vs Python NTT/NTTInverse

2026-06-24 22:51:14 +08:00

.claude

feat: init mlkem project with Verilator test framework

2026-06-24 19:43:29 +08:00

.opencode

feat: init mlkem project with Verilator test framework

2026-06-24 19:43:29 +08:00

.trellis

feat: init mlkem project with Verilator test framework

2026-06-24 19:43:29 +08:00

sync_rtl

feat(ntt): implement synchronous NTT core with Barrett modular reduction

2026-06-24 22:51:14 +08:00

test_framework

feat(ntt): implement synchronous NTT core with Barrett modular reduction

2026-06-24 22:51:14 +08:00

.gitignore

chore: add .gitignore, remove build artifacts from tracking

2026-06-24 19:43:40 +08:00

AGENTS.md

feat: init mlkem project with Verilator test framework

2026-06-24 19:43:29 +08:00

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