FallenSigh
79653ac3a5
- Replace -include_dirs . with -i . (Vivado 2019.2 syntax)
- Add --timescale 1ns/1ps to all xelab commands
- Add LD_PRELOAD comment for ncurses compatibility
- Add run_tb.sh convenience script
Usage: ./run_tb.sh mod_add
./run_tb.sh --list
- Update spec with Vivado 2019.2 compatibility notes
65 lines
2.2 KiB
Tcl
65 lines
2.2 KiB
Tcl
# NOTE: On some systems, you may need:
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# export LD_PRELOAD=/usr/lib64/libtinfo.so.5
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# before running this script.
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# xsim_run.tcl - Vivado xsim compilation and simulation script for comp_decomp_sync
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#
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# Compiles comp_decomp_sync RTL + dependencies + testbench and runs simulation.
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# Run from the project root: ~/Dev/mlkem/
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#
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# Prerequisites:
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# source /opt/Xilinx/Vivado/2019.2/settings64.sh
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#
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# Usage examples:
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# # Step-by-step (from Tcl):
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# xsim -runall xsim_run.tcl
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#
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# # Or via Vivado batch mode:
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# vivado -mode batch -source xsim_run.tcl
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#
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# # Or manually:
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# xvlog -sv sync_rtl/common/pipeline_reg.v sync_rtl/comp_decomp/comp_decomp_sync.v sync_rtl/comp_decomp/TB/tb_comp_decomp_xsim.v
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# xelab tb_comp_decomp_xsim -s tb_comp_decomp_xsim
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# xsim tb_comp_decomp_xsim -R
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# ================================================================
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# Configuration
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# ================================================================
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set RTL_DIR sync_rtl
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set DUT_DIR sync_rtl/comp_decomp
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set TB_DIR sync_rtl/comp_decomp/TB
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# ================================================================
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# Step 1: Compile all source files (xvlog)
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# ================================================================
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puts "=== Compiling RTL sources for comp_decomp_sync ==="
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# Common dependency (pipeline register)
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xvlog -sv -i . ${RTL_DIR}/common/pipeline_reg.v
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# DUT (comp_decomp_sync) — uses `include "sync_rtl/common/defines.vh"
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xvlog -sv -i . ${DUT_DIR}/comp_decomp_sync.v
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# ================================================================
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# Step 2: Compile testbench
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# ================================================================
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puts "=== Compiling testbench ==="
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xvlog -sv ${TB_DIR}/tb_comp_decomp_xsim.v
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# ================================================================
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# Step 3: Elaborate snapshot (xelab)
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# ================================================================
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puts "=== Elaborating snapshot ==="
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xelab tb_comp_decomp_xsim -s tb_comp_decomp_xsim --timescale 1ns/1ps
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# ================================================================
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# Step 4: Run simulation
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# ================================================================
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puts "=== Running comp_decomp_sync XSIM test ==="
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xsim tb_comp_decomp_xsim -R
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puts ""
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puts "=== Simulation complete ==="
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