Add file-based vector testbenches ( + ) for: - mod_add_sync, rng_sync, poly_arith_sync, comp_decomp_sync - s_bram/sd_bram, sha3_chain_top - ntt_core, poly_mul_sync - sample_cbd_sync, sample_ntt_sync Each module includes: - tb_<module>_xsim.v: Vivado XSIM testbench - gen_vectors.py: Python vector generator (stdlib only) - vectors/<module>_input.hex: test input vectors - xsim_run.tcl: compile + elaborate + simulate script
86 lines
2.4 KiB
Python
86 lines
2.4 KiB
Python
#!/usr/bin/env python3
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"""Generate expected LFSR output states for rng_sync module.
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Computes the Galois LFSR sequence for the RTL default seed and writes
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expected states to rng_input.hex (one 256-bit hex word per line).
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The RTL uses a Galois LFSR with taps at bits 255, 253, 252, 247, 0.
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On each valid_i pulse, the LFSR advances to the next state. valid_o
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is asserted the following cycle with data_o = new state.
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"""
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import os
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# Default seed from rng_sync.v
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SEED = 0xDEADBEEFCAFEBABEFEEDFACEDECAFBAD1234567887654321ABCDEF010FEDCBA9
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# Number of test vectors to generate
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NUM_VECTORS = 32
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def lfsr_advance(state):
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"""
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Advance the 256-bit Galois LFSR by one step.
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RTL tap positions (0-indexed): 255, 253, 252, 247, 0.
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Algorithm (matching the RTL):
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1. feedback = state[0] (LSB)
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2. Shift right by 1: lfsr_next[i] = state[i+1] for i=0..254
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3. lfsr_next[255] = feedback
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4. XOR feedback into lfsr_next at tap-derived positions:
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- bit 254 (tap 255 after shift: 255 -> 254)
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- bit 252 (tap 253 after shift: 253 -> 252)
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- bit 251 (tap 252 after shift: 252 -> 251)
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- bit 246 (tap 247 after shift: 247 -> 246)
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"""
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feedback = state & 1
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# Shift right by 1
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next_state = state >> 1
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# MSB gets feedback
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if feedback:
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next_state |= (1 << 255)
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# XOR feedback at tap-derived positions
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if feedback:
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next_state ^= (1 << 254)
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next_state ^= (1 << 252)
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next_state ^= (1 << 251)
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next_state ^= (1 << 246)
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return next_state
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def format_hex_256(val):
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"""Format 256-bit integer as 64-character hex string."""
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return f"{val:064x}"
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def main():
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vectors_dir = os.path.join(os.path.dirname(__file__), "vectors")
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os.makedirs(vectors_dir, exist_ok=True)
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output_path = os.path.join(vectors_dir, "rng_input.hex")
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state = SEED
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with open(output_path, "w") as f:
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print(f"Seed: {format_hex_256(SEED)}")
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print(f"Generating {NUM_VECTORS} expected LFSR states...")
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print()
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for i in range(NUM_VECTORS):
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# Each valid_i advances the LFSR; the next state is what
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# appears on data_o when valid_o is asserted.
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state = lfsr_advance(state)
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f.write(format_hex_256(state) + "\n")
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print(f"[{i:3d}] step {i+1}: {format_hex_256(state)}")
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print(f"\nWrote {NUM_VECTORS} vectors to {output_path}")
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if __name__ == "__main__":
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main()
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