FallenSigh
5941fee980
Phase 1 complete — all 4 leaf modules verified: - rng_sync.v: 256-bit Galois LFSR PRNG (10/10 PASS) - sample_cbd_sync.v: CBD sampler with keccak_core PRF (2560/2560 PASS) - sample_ntt_sync.v: SHAKE-128 rejection sampling for A matrix (1536/1536 PASS) - xsim Verilog TBs for sha3 module (tb_sha3_xsim.v, tb_sha3_xsim_simple.v, tb_keccak_core_xsim.v)
18 lines
382 B
JSON
18 lines
382 B
JSON
{
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"module": "rng",
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"rtl_top": "sync_rtl/rng/rng_sync.v",
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"rtl_deps": [],
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"tb_cpp": "sync_rtl/rng/TB/tb_rng.cpp",
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"simulator": "verilator",
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"timeout_s": 30,
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"cases": [
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{
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"id": "basic",
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"description": "Generate 10 pseudo-random 256-bit values with fixed-seed LFSR",
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"params": {},
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"num_vectors": 10,
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"tolerance": "bit_exact"
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}
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]
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}
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