fallensigh/mlkem-sync
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Author SHA1 Message Date
FallenSigh
b7eb59fb5b add design report and timing analysis report 2026-06-30 02:49:40 +08:00
FallenSigh
faf15ee113 docs: 新增 mlkem_top RTL 结构图 (SVG) 
用模块内真实实例名/信号名绘制的 mlkem_top RTL 框图:输入端口、控制 FSM
+ 状态寄存器、共享 keccak 三路仲裁、叶子算子(sha3/snt/cbd/ntt/pmul/comp)、
五个 sd_bram 存储库、ss_o 隐式拒绝 mux 与各 dbg 回读抽头。三色连线区分
数据通路 / BRAM 端口 / 共享仲裁。
 2026-06-30 02:42:31 +08:00
FallenSigh
5d86000231 add docs and test data 2026-06-27 03:53:53 +08:00