feat: init mlkem project with Verilator test framework

- sync_rtl/common/: skid_buffer, pipeline_reg, defines (valid/ready)
- sync_rtl/mod_add/: modular adder example with Verilator C++ TB
- test_framework/: Python-driven Verilator compile/sim/compare pipeline
- test_framework/modules/mod_add/: 50-vector test plan, full鏈路 PASS
- .trellis/spec/: RTL and test_framework conventions documented

sync_rtl/common/defines.vh

@@ -0,0 +1,6 @@
+`ifndef DEFINES_VH
+`define DEFINES_VH
+`define CLK_PERIOD 10.0  // 100MHz
+`define Q 3329           // ML-KEM prime modulus
+`define N 256            // polynomial degree
+`endif