feat(poly_arith): implement synchronous PolyAdd/PolySub streaming module
Phase 2.3: Polynomial modular addition and subtraction. - poly_arith_sync.v: mode=0 add (a+b mod Q), mode=1 sub (a-b mod Q) - Pure streaming (1 coeff/cycle, no BRAM needed) - Uses pipeline_reg for valid/ready handshake Verified: 10/10 vectors bit-exact vs Python reference
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108
test_framework/modules/poly_arith/gen_vectors.py
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108
test_framework/modules/poly_arith/gen_vectors.py
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"""gen_vectors.py - Test vector generator for poly_arith module.
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Generates streaming 256-coefficient polynomial add/sub test vectors.
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Each vector: "MODE A0..A255 B0..B255" (513 space-separated hex values).
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Expected: "C0 C1 ... C255" (256 space-separated hex values).
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"""
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import os
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import random
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import sys
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# Add test_framework/lib to path for VectorGenerator base class
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sys.path.insert(0, os.path.join(os.path.dirname(__file__), '..', '..', 'lib'))
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from vector_gen import VectorGenerator
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Q = 3329 # ML-KEM prime modulus
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N = 256 # polynomial degree
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class PolyArithVectorGenerator(VectorGenerator):
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"""Generates test vectors for the poly_arith_sync module."""
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def generate_one(self, params: dict) -> dict:
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"""Generate one polynomial add or sub vector.
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Generates 256 random coefficients for A and B, computes expected
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result as (A[i] +/- B[i]) mod Q.
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Args:
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params: dict with optional 'mode' key ('add' or 'sub').
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Returns:
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dict with 'input' and 'expected' keys.
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"""
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mode = params.get('mode', 'add')
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A = [random.randint(0, Q - 1) for _ in range(N)]
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B = [random.randint(0, Q - 1) for _ in range(N)]
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if mode == 'sub':
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expected = [(a - b) % Q for a, b in zip(A, B)]
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else:
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expected = [(a + b) % Q for a, b in zip(A, B)]
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return {
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'input': {'mode': mode, 'A': A, 'B': B},
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'expected': {'C': expected}
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}
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def write_hex_file(self, vectors: list[dict], filepath: str) -> None:
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"""Write input vectors as hex file.
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Format: "MODE A0 A1 ... A255 B0 B1 ... B255"
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MODE is 'A' for add, 'S' for sub.
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Args:
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vectors: List of vector dicts from generate_one().
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filepath: Path to write the hex file.
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"""
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os.makedirs(os.path.dirname(filepath), exist_ok=True)
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with open(filepath, 'w') as f:
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for v in vectors:
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inp = v['input']
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mode_char = 'A' if inp['mode'] == 'add' else 'S'
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A_hex = ' '.join(f'{c:03X}' for c in inp['A'])
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B_hex = ' '.join(f'{c:03X}' for c in inp['B'])
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f.write(f'{mode_char} {A_hex} {B_hex}\n')
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def write_expected_file(self, vectors: list[dict], filepath: str) -> None:
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"""Write expected results as hex file.
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Format: "C0 C1 ... C255" (one space-separated line per vector).
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Args:
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vectors: List of vector dicts from generate_one().
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filepath: Path to write the expected hex file.
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"""
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os.makedirs(os.path.dirname(filepath), exist_ok=True)
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with open(filepath, 'w') as f:
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for v in vectors:
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C = v['expected']['C']
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C_hex = ' '.join(f'{c:03X}' for c in C)
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f.write(f'{C_hex}\n')
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def compare_results(self, got: list[str], expected_file: str) -> bool:
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"""Compare RTL output against expected values.
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Args:
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got: List of result strings from simulation.
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Each is " C0 C1 ... C255" after "RESULT:" prefix.
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expected_file: Path to expected hex file.
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Returns:
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bool: True if all results match.
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"""
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with open(expected_file, 'r') as f:
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expected = [line.strip() for line in f
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if line.strip() and not line.startswith('#')]
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if len(got) != len(expected):
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return False
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for i, (g, e) in enumerate(zip(got, expected)):
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if g.strip() != e.strip():
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return False
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return True
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24
test_framework/modules/poly_arith/test_plan.json
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24
test_framework/modules/poly_arith/test_plan.json
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{
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"module": "poly_arith",
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"rtl_top": "sync_rtl/poly_arith/poly_arith_sync.v",
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"rtl_deps": ["sync_rtl/common/pipeline_reg.v"],
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"tb_cpp": "sync_rtl/poly_arith/TB/tb_poly_arith.cpp",
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"simulator": "verilator",
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"timeout_s": 30,
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"cases": [
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{
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"id": "add",
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"description": "Polynomial modular addition: (A[i] + B[i]) mod Q for 256 coeffs, 5 random vectors",
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"params": {"mode": "add"},
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"num_vectors": 5,
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"tolerance": "bit_exact"
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},
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{
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"id": "sub",
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"description": "Polynomial modular subtraction: (A[i] - B[i]) mod Q for 256 coeffs, 5 random vectors",
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"params": {"mode": "sub"},
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"num_vectors": 5,
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"tolerance": "bit_exact"
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}
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]
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}
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