chore(task): archive 06-25-vivado-verilog-tb

2026-06-25 20:59:32 +08:00
parent db0a559826
commit 171ffd91d3
4 changed files with 195 additions and 0 deletions
--- a/.trellis/tasks/archive/2026-06/06-25-vivado-verilog-tb/task.json
+++ b/.trellis/tasks/archive/2026-06/06-25-vivado-verilog-tb/task.json
@@ -0,0 +1,26 @@
+{
+  "id": "vivado-verilog-tb",
+  "name": "vivado-verilog-tb",
+  "title": "编写所有模块的Vivado Verilog Testbench",
+  "description": "",
+  "status": "completed",
+  "dev_type": null,
+  "scope": null,
+  "package": null,
+  "priority": "P2",
+  "creator": "FallenSigh",
+  "assignee": "FallenSigh",
+  "createdAt": "2026-06-25",
+  "completedAt": "2026-06-25",
+  "branch": null,
+  "base_branch": "main",
+  "worktree_path": null,
+  "commit": null,
+  "pr_url": null,
+  "subtasks": [],
+  "children": [],
+  "parent": null,
+  "relatedFiles": [],
+  "notes": "",
+  "meta": {}
+}