100 lines
2.1 KiB
C
100 lines
2.1 KiB
C
#ifndef common_func_H
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#define common_func_H
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#include <larchintrin.h>
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typedef signed int S32;
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typedef unsigned int U32;
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typedef unsigned int uint32_t;
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typedef signed short S16;
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typedef unsigned short U16;
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typedef signed char S8;
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typedef unsigned char U8;
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typedef long long S64;
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typedef unsigned long long U64;
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void RegWrite(unsigned int addr,unsigned int var);
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unsigned int RegRead(unsigned int addr);
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void SaveMemory(unsigned int *DestAddr, unsigned int *SrcAddr, unsigned int Size);
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static inline U32 csr_readl(U32 reg)
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{
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return __csrrd_w(reg);
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}
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static inline U64 csr_readq(U32 reg)
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{
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return __csrrd_w(reg);
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}
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static inline void csr_writel(U32 val, U32 reg)
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{
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__csrwr_w(val, reg);
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}
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static inline void csr_writeq(U64 val, U32 reg)
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{
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__csrwr_w(val, reg);
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}
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static inline U32 csr_xchgl(U32 val, U32 mask, U32 reg)
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{
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return __csrxchg_w(val, mask, reg);
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}
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static inline U64 csr_xchgq(U64 val, U64 mask, U32 reg)
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{
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return __csrxchg_w(val, mask, reg);
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}
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#define CacheOp_Cache 0x03
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#define CacheOp_Op 0x1c
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#define Cache_I 0x00
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#define Cache_D 0x01
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#define Cache_V 0x02
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#define Cache_S 0x03
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#define Index_Invalidate 0x08
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#define Index_Writeback_Inv 0x08
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#define Hit_Invalidate 0x10
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#define Hit_Writeback_Inv 0x10
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#define Index_Invalidate_I (Cache_I | Index_Invalidate)
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#define Index_Writeback_Inv_D (Cache_D | Index_Writeback_Inv)
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#define Hit_Invalidate_I (Cache_I | Hit_Invalidate)
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#define Hit_Writeback_Inv_D (Cache_D | Hit_Writeback_Inv)
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#define cache_op(op, addr) \
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__asm__ __volatile__( \
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" cacop %0, %1 \n" \
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: \
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: "i" (op), "R" (*(unsigned char *)(addr)))
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static inline void flush_icache_line_indexed(unsigned long addr)
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{
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cache_op(Index_Invalidate_I, addr);
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}
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static inline void flush_dcache_line_indexed(unsigned long addr)
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{
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cache_op(Index_Writeback_Inv_D, addr);
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}
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static inline void flush_icache_line(unsigned long addr)
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{
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cache_op(Hit_Invalidate_I, addr);
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}
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static inline void flush_dcache_line(unsigned long addr)
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{
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cache_op(Hit_Writeback_Inv_D, addr);
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}
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static inline void init_dcache_line(unsigned long addr)
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{
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cache_op(0x01, addr);
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}
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#endif
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