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FallenSigh ae89363227 perf(matmul): bypass printf — direct UART 16550 register writes ...

Replace all printf() calls with direct UART THR register access:
- uart_tx(): poll LSR bit5, write byte to THR
- uart_puts(): null-terminated string output
- uart_puthex(): 8-digit lowercase hex for CRC32

Eliminates picolibc printf overhead: no format parsing, no FILE* I/O,
no locale, no buffering. UART runs at 115200 baud (~8.7μs/byte),
THR nearly always empty at 33MHz core → single poll iteration.

Output: MATMUL_START, MATMUL_CRC32=XXXXXXXX, MATMUL_DONE

2026-06-26 17:51:13 +08:00

..

software

perf(matmul): bypass printf — direct UART 16550 register writes

2026-06-26 17:51:13 +08:00

axi_ram.mif

perf(matmul): pre-fire DMA Ch0 load + inline wait/DMA start + XOR bank toggle

2026-06-26 03:39:32 +08:00

fft_dma.bin

Remove all debug and printf

2026-06-25 15:44:18 +08:00

fft.bin

Remove all debug and printf

2026-06-25 15:44:18 +08:00

hello_world.bin

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

toolchains

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

user-sample.bin

perf(matmul): pre-fire DMA Ch0 load + inline wait/DMA start + XOR bank toggle

2026-06-26 03:39:32 +08:00