38 lines
3.6 KiB
Plaintext
38 lines
3.6 KiB
Plaintext
Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
|
|
-------------------------------------------------------------------------------------------------------------------------------
|
|
| Tool Version : Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
|
|
| Date : Wed Jul 8 03:35:00 2026
|
|
| Host : fedora running 64-bit unknown
|
|
| Command : report_design_analysis -complexity -file /home/fallensigh/vivado_reports_nodsp/design_analysis_complexity.rpt
|
|
| Design : soc_top
|
|
| Device : xc7a200t
|
|
| Design State : Routed
|
|
-------------------------------------------------------------------------------------------------------------------------------
|
|
|
|
Report Design Analysis
|
|
|
|
Table of Contents
|
|
-----------------
|
|
1. Complexity Characteristics (Cells)
|
|
|
|
1. Complexity Characteristics (Cells)
|
|
-------------------------------------
|
|
|
|
+---------------------------+---------------------+------+----------------+-----------------+-----------+-------------+-------------+-------------+-------------+--------------+------------+-----+------+------+------+
|
|
| Instance | Module | Rent | Average Fanout | Total Instances | LUT1 | LUT2 | LUT3 | LUT4 | LUT5 | LUT6 | Memory LUT | DSP | RAMB | MUXF | URAM |
|
|
+---------------------------+---------------------+------+----------------+-----------------+-----------+-------------+-------------+-------------+-------------+--------------+------------+-----+------+------+------+
|
|
| (top) | soc_top | 0.34 | 3.77 | 118528 | 801(1.2%) | 6978(10.2%) | 9384(13.7%) | 7294(10.7%) | 8477(12.4%) | 35413(51.8%) | 1175 | 16 | 39 | 6020 | 0 |
|
|
| u_axi_axil_adapter | axi_axil_adapter | 0.50 | 5.92 | 1309 | 0(0.0%) | 8(0.7%) | 43(3.8%) | 100(8.9%) | 200(17.7%) | 776(68.9%) | 0 | 0 | 0 | 0 | 0 |
|
|
| u_axi_uart_controller | axi_uart_controller | 0.55 | 3.54 | 1296 | 10(1.2%) | 84(10.4%) | 80(9.9%) | 144(17.9%) | 194(24.1%) | 293(36.4%) | 0 | 0 | 0 | 9 | 0 |
|
|
| u_cdma_matmul_bridge | cdma_matmul_bridge | 0.46 | 2.22 | 1002 | 1(0.3%) | 65(17.1%) | 39(10.3%) | 174(45.8%) | 13(3.4%) | 88(23.2%) | 0 | 0 | 0 | 0 | 0 |
|
|
| u_cpu | core_top | 0.56 | 3.96 | 15822 | 168(1.8%) | 579(6.3%) | 1029(11.1%) | 871(9.4%) | 1744(18.9%) | 4860(52.5%) | 0 | 0 | 20 | 276 | 0 |
|
|
| u_fft_mlkem_axi_slave | fft_mlkem_axi_slave | 0.56 | 3.75 | 74954 | 362(0.9%) | 3923(9.7%) | 6649(16.4%) | 4109(10.2%) | 4490(11.1%) | 20899(51.7%) | 1169 | 16 | 18 | 5286 | 0 |
|
|
| u_matmul_axi_slave | matmul_axi_slave | 0.63 | 3.76 | 15159 | 18(0.2%) | 1646(15.2%) | 357(3.3%) | 830(7.6%) | 974(9.0%) | 7026(64.7%) | 6 | 0 | 0 | 413 | 0 |
|
|
| u_snix_axil_cdma_mux_8ch | snix_axil_cdma_mux | 0.36 | 3.45 | 3680 | 136(6.5%) | 181(8.6%) | 405(19.3%) | 255(12.2%) | 342(16.3%) | 776(37.0%) | 0 | 0 | 1 | 4 | 0 |
|
|
+---------------------------+---------------------+------+----------------+-----------------+-----------+-------------+-------------+-------------+-------------+--------------+------------+-----+------+------+------+
|
|
* Complexity Ranges
|
|
** 0.0 - 0.3 -> Very Low, 0.3 - 0.5 -> low, 0.5 - 0.65 -> normal, 0.65 - 0.85 -> high, 0.85 - 1.0 -> very high
|
|
*** -* -> Not computable as cell size is very small
|
|
|
|
|