415 lines
14 KiB
C
415 lines
14 KiB
C
/**
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* mlkem_test - ML-KEM hardware accelerator example (CIC-IEC 2026)
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*
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* Exercises the mlkem_axi_slave at 0xbf400000 by running a full
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* KeyGen -> Encaps -> Decaps round trip on ML-KEM-512 (k=2) and verifying
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* that the decapsulated shared secret matches the encapsulated one. This is a
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* self-consistency check: it needs no external golden vectors, yet touches
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* every register path (seeds, start/poll, byte preload, byte readback, ss).
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*
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* KeyGen : d,z -> ek (800 B), dk (1632 B)
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* Encaps : ek + msg -> ss, ct (768 B)
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* Decaps : dk + ct -> ss' (must equal ss)
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*
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* The core runs at sys_clk/2 (25 MHz); the wrapper hides the clock crossing,
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* so software just does normal MMIO loads/stores (preload writes are
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* automatically wait-stated on the bus).
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*/
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#include <string.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <confreg_time.h>
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#include "dma.h"
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/* ─── BSP globals ─────────────────────────────────────────────────── */
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unsigned long UART_BASE = 0xbf000000;
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unsigned long CONFREG_TIMER_BASE = 0xbf20f100;
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unsigned long CONFREG_CLOCKS_PER_SEC = 50000000L;
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unsigned long CORE_CLOCKS_PER_SEC = 33000000L;
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/* ─── ML-KEM IP register map (base 0xbf400000) ────────────────────── */
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#define MLKEM_BASE 0xbf400000
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#define MLKEM_CTRL (MLKEM_BASE + 0x000) /* W bit0 = start */
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#define MLKEM_STATUS (MLKEM_BASE + 0x004) /* R busy/done/preload_busy */
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#define MLKEM_CONFIG (MLKEM_BASE + 0x008) /* RW [2:0]=k [5:4]=op */
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#define MLKEM_D (MLKEM_BASE + 0x010) /* RW seed d (8 words) */
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#define MLKEM_Z (MLKEM_BASE + 0x030) /* RW seed z (8 words) */
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#define MLKEM_MSG (MLKEM_BASE + 0x050) /* RW message (8 words) */
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#define MLKEM_SS (MLKEM_BASE + 0x070) /* R shared secret (8 words) */
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#define MLKEM_PRE_SEL (MLKEM_BASE + 0x100) /* RW 0=ek 1=dk 2=c */
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#define MLKEM_PRE_ADR (MLKEM_BASE + 0x104) /* RW byte addr (auto-incr) */
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#define MLKEM_PRE_DAT (MLKEM_BASE + 0x108) /* W byte -> selected port */
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#define MLKEM_RDB_SEL (MLKEM_BASE + 0x10C) /* RW 0=ek 1=dk_pke 2=dk 3=ct */
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#define MLKEM_RDB_ADR (MLKEM_BASE + 0x110) /* RW output byte index */
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#define MLKEM_RDB_DAT (MLKEM_BASE + 0x114) /* R selected byte (low 8b) */
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#define MLKEM_EK_WINDOW (MLKEM_BASE + 0x1000) /* W preload ek, R read ek */
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#define MLKEM_DK_WINDOW (MLKEM_BASE + 0x2000) /* W preload dk, R read dk */
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#define MLKEM_CT_WINDOW (MLKEM_BASE + 0x3000) /* W preload c, R read ct */
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/* PRNG sub-window in the shared ML-KEM/FFT/PRNG AXI slave. */
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#define PRNG_BASE (MLKEM_BASE + 0xD000)
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#define PRNG_CTRL (PRNG_BASE + 0x000) /* W bit0=mix seed bit1=clr count */
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#define PRNG_STATUS (PRNG_BASE + 0x004) /* R bit0=ready */
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#define PRNG_DATA (PRNG_BASE + 0x008) /* R next pseudo-random word */
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#define PRNG_COUNT (PRNG_BASE + 0x00C) /* R data read count */
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#define PRNG_SEED (PRNG_BASE + 0x010) /* RW software seed mix value */
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#define CTRL_START 0x1
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#define STATUS_BUSY 0x1
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#define STATUS_DONE 0x2
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#define PRNG_READY 0x1
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#define PRNG_CTRL_MIX 0x1
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#define OP_KEYGEN 0
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#define OP_ENCAPS 1
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#define OP_DECAPS 2
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/* preload select */
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#define PRE_EK 0
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#define PRE_DK 1
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#define PRE_C 2
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/* readback select */
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#define RDB_EK 0
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#define RDB_DKP 1
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#define RDB_DK 2
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#define RDB_CT 3
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/* ─── ML-KEM-512 (k=2) byte sizes ─────────────────────────────────── */
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#define KVAL 2
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#define EK_BYTES (384 * KVAL + 32) /* 800 */
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#define DKP_BYTES (384 * KVAL) /* 768 */
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#define DK_BYTES (DKP_BYTES + EK_BYTES + 32 + 32) /* 1632 */
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#define CT_BYTES 768
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/* ─── Convenience macros ──────────────────────────────────────────── */
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#define REG_WR(addr, val) (*(volatile uint32_t *)(addr) = (uint32_t)(val))
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#define REG_RD(addr) (*(volatile uint32_t *)(addr))
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#define PHYS_ADDR(addr) ((uint32_t)(addr) & 0x1FFFFFFFu)
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#define UNCACHED_ADDR(addr) ((PHYS_ADDR(addr)) | 0xA0000000u)
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/* PLACEHOLDER */
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/* ─── Wait until the core finishes the current op ─────────────────── */
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static void wait_done(void)
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{
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while (!(REG_RD(MLKEM_STATUS) & STATUS_DONE))
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;
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}
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/* Clear the latched done flag (W1C) before launching a new op. */
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static void clear_done(void)
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{
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REG_WR(MLKEM_STATUS, STATUS_DONE);
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}
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/* Launch the op currently configured in CONFIG and block until done. */
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static void run_op(uint32_t op)
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{
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REG_WR(MLKEM_CONFIG, ((op & 0x3) << 4) | (KVAL & 0x7));
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clear_done();
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REG_WR(MLKEM_CTRL, CTRL_START);
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wait_done();
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}
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/* Write a 256-bit value (32 bytes) into one of the seed/msg windows.
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* Byte i of the logical value lands in word[i>>2] byte (i&3) — i.e. the
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* core sees byte 0 in D[0][7:0], matching mlkem_top's d_i[7:0] convention. */
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static void write_block32(uint32_t base, const uint8_t *bytes)
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{
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int w;
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for (w = 0; w < 8; w++) {
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uint32_t v = (uint32_t)bytes[w*4 + 0]
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| ((uint32_t)bytes[w*4 + 1] << 8)
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| ((uint32_t)bytes[w*4 + 2] << 16)
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| ((uint32_t)bytes[w*4 + 3] << 24);
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REG_WR(base + w*4, v);
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}
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}
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/* Read a 256-bit value (32 bytes) back from a window (used for SS). */
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static void read_block32(uint32_t base, uint8_t *bytes)
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{
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int w;
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for (w = 0; w < 8; w++) {
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uint32_t v = REG_RD(base + w*4);
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bytes[w*4 + 0] = (uint8_t)(v & 0xFF);
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bytes[w*4 + 1] = (uint8_t)((v >> 8) & 0xFF);
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bytes[w*4 + 2] = (uint8_t)((v >> 16) & 0xFF);
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bytes[w*4 + 3] = (uint8_t)((v >> 24) & 0xFF);
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}
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}
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/* Filled from the PRNG endpoint at runtime. */
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static uint8_t SEED_D[32];
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static uint8_t SEED_Z[32];
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static uint8_t MSG_M[32];
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static uint32_t prng_read_word(void)
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{
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while ((REG_RD(PRNG_STATUS) & PRNG_READY) == 0)
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;
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return REG_RD(PRNG_DATA);
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}
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static void prng_mix_seed(uint32_t seed)
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{
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REG_WR(PRNG_SEED, seed);
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REG_WR(PRNG_CTRL, PRNG_CTRL_MIX);
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}
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static void prng_fill(uint8_t *bytes, int n)
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{
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int i;
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for (i = 0; i < n; i += 4) {
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uint32_t v = prng_read_word();
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bytes[i + 0] = (uint8_t)(v & 0xFF);
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if (i + 1 < n) bytes[i + 1] = (uint8_t)((v >> 8) & 0xFF);
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if (i + 2 < n) bytes[i + 2] = (uint8_t)((v >> 16) & 0xFF);
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if (i + 3 < n) bytes[i + 3] = (uint8_t)((v >> 24) & 0xFF);
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}
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}
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static void generate_prng_inputs(void)
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{
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prng_mix_seed((uint32_t)get_clock_count());
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prng_fill(SEED_D, sizeof(SEED_D));
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prng_fill(SEED_Z, sizeof(SEED_Z));
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prng_fill(MSG_M, sizeof(MSG_M));
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}
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/* Stream `n` bytes into a preload port. Each PRE_DAT write auto-increments
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* the preload address; the bus wait-states each write until the cross-domain
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* byte handshake completes, so a plain loop is correct. */
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static void preload(uint32_t sel, const uint8_t *buf, int n)
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{
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int i;
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REG_WR(MLKEM_PRE_SEL, sel);
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REG_WR(MLKEM_PRE_ADR, 0);
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for (i = 0; i < n; i++)
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REG_WR(MLKEM_PRE_DAT, buf[i]);
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}
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/* Read `n` bytes out of a readback tap. RDB_ADR has no auto-increment, so set
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* the index for each byte (write addr, then read data). */
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static void readback(uint32_t sel, uint8_t *buf, int n)
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{
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int i;
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REG_WR(MLKEM_RDB_SEL, sel);
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for (i = 0; i < n; i++) {
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REG_WR(MLKEM_RDB_ADR, i);
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buf[i] = (uint8_t)(REG_RD(MLKEM_RDB_DAT) & 0xFF);
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}
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}
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/* PLACEHOLDER2 */
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static volatile uint8_t *uncached_u8(uint8_t *buf)
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{
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return (volatile uint8_t *)UNCACHED_ADDR(buf);
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}
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static void dma_to_mlkem(uint32_t dst_window, volatile uint8_t *src, int n)
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{
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dma_start_transfer(0, PHYS_ADDR(src), PHYS_ADDR(dst_window), (uint32_t)n, 0);
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dma_wait_polling(0);
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}
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static void dma_from_mlkem(volatile uint8_t *dst, uint32_t src_window, int n)
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{
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dma_start_transfer(0, PHYS_ADDR(src_window), PHYS_ADDR(dst), (uint32_t)n, 0);
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dma_wait_polling(0);
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}
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static void print_hex_uc(const char *label, volatile uint8_t *b, int n)
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{
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int i;
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printf("%s", label);
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for (i = 0; i < n; i++)
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printf("%02x", b[i]);
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printf("\n");
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}
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static void clear_uc(volatile uint8_t *b, int n)
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{
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int i;
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for (i = 0; i < n; i++)
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b[i] = 0;
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}
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static void copy_from_uc(uint8_t *dst, volatile uint8_t *src, int n)
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{
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int i;
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for (i = 0; i < n; i++)
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dst[i] = src[i];
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}
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typedef struct {
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uint8_t ek[EK_BYTES] __attribute__((aligned(64)));
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uint8_t dk[DK_BYTES] __attribute__((aligned(64)));
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uint8_t ct[CT_BYTES] __attribute__((aligned(64)));
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uint8_t ss_enc[32];
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uint8_t ss_dec[32];
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} mlkem_result_t;
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static mlkem_result_t cpu_res;
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static mlkem_result_t dma_res;
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static void print_hex(const char *label, const uint8_t *b, int n)
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{
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int i;
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printf("%s", label);
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for (i = 0; i < n; i++)
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printf("%02x", b[i]);
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printf("\n");
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}
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static int verify_result(const mlkem_result_t *res)
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{
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int i, mismatch;
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mismatch = 0;
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for (i = 0; i < 32; i++)
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if (res->ss_enc[i] != res->ss_dec[i]) mismatch++;
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return mismatch;
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}
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static void clear_result_cpu(mlkem_result_t *res)
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{
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memset(res, 0, sizeof(*res));
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}
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static void clear_result_dma(mlkem_result_t *res)
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{
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volatile uint8_t *p = (volatile uint8_t *)UNCACHED_ADDR(res);
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clear_uc(p, sizeof(*res));
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}
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static unsigned long run_roundtrip_cpu(const uint8_t *seed_d,
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const uint8_t *seed_z,
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const uint8_t *msg,
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mlkem_result_t *res)
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{
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unsigned long t0, t1;
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clear_result_cpu(res);
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t0 = get_clock_count();
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write_block32(MLKEM_D, seed_d);
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write_block32(MLKEM_Z, seed_z);
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run_op(OP_KEYGEN);
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readback(RDB_EK, res->ek, EK_BYTES);
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readback(RDB_DK, res->dk, DK_BYTES);
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preload(PRE_EK, res->ek, EK_BYTES);
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write_block32(MLKEM_MSG, msg);
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run_op(OP_ENCAPS);
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read_block32(MLKEM_SS, res->ss_enc);
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readback(RDB_CT, res->ct, CT_BYTES);
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preload(PRE_DK, res->dk, DK_BYTES);
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preload(PRE_C, res->ct, CT_BYTES);
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run_op(OP_DECAPS);
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read_block32(MLKEM_SS, res->ss_dec);
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t1 = get_clock_count();
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return t1 - t0;
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}
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static unsigned long run_roundtrip_dma(const uint8_t *seed_d,
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const uint8_t *seed_z,
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const uint8_t *msg,
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mlkem_result_t *res)
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{
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unsigned long t0, t1;
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volatile uint8_t *ek_uc = uncached_u8(res->ek);
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volatile uint8_t *dk_uc = uncached_u8(res->dk);
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volatile uint8_t *ct_uc = uncached_u8(res->ct);
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clear_result_dma(res);
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t0 = get_clock_count();
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write_block32(MLKEM_D, seed_d);
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write_block32(MLKEM_Z, seed_z);
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run_op(OP_KEYGEN);
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dma_from_mlkem(ek_uc, MLKEM_EK_WINDOW, EK_BYTES);
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dma_from_mlkem(dk_uc, MLKEM_DK_WINDOW, DK_BYTES);
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dma_to_mlkem(MLKEM_EK_WINDOW, ek_uc, EK_BYTES);
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write_block32(MLKEM_MSG, msg);
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run_op(OP_ENCAPS);
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read_block32(MLKEM_SS, res->ss_enc);
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dma_from_mlkem(ct_uc, MLKEM_CT_WINDOW, CT_BYTES);
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dma_to_mlkem(MLKEM_DK_WINDOW, dk_uc, DK_BYTES);
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dma_to_mlkem(MLKEM_CT_WINDOW, ct_uc, CT_BYTES);
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run_op(OP_DECAPS);
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read_block32(MLKEM_SS, res->ss_dec);
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t1 = get_clock_count();
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copy_from_uc(res->ek, ek_uc, EK_BYTES);
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copy_from_uc(res->dk, dk_uc, DK_BYTES);
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copy_from_uc(res->ct, ct_uc, CT_BYTES);
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return t1 - t0;
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}
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static int compare_results(const mlkem_result_t *a, const mlkem_result_t *b)
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{
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return memcmp(a->ek, b->ek, EK_BYTES) ||
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memcmp(a->dk, b->dk, DK_BYTES) ||
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memcmp(a->ct, b->ct, CT_BYTES) ||
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memcmp(a->ss_enc, b->ss_enc, sizeof(a->ss_enc)) ||
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memcmp(a->ss_dec, b->ss_dec, sizeof(a->ss_dec));
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}
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static unsigned long cycles_to_us(unsigned long cycles)
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{
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return cycles / (CORE_CLOCKS_PER_SEC / USEC_PER_SEC);
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}
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int main(void)
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{
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int mismatch_cpu, mismatch_dma, result_diff;
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unsigned long cpu_cycles, dma_cycles;
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printf("MLKEM_START\n");
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generate_prng_inputs();
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cpu_cycles = run_roundtrip_cpu(SEED_D, SEED_Z, MSG_M, &cpu_res);
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dma_cycles = run_roundtrip_dma(SEED_D, SEED_Z, MSG_M, &dma_res);
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mismatch_cpu = verify_result(&cpu_res);
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mismatch_dma = verify_result(&dma_res);
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result_diff = compare_results(&cpu_res, &dma_res);
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print_hex("CPU_EK32=", cpu_res.ek, 32);
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print_hex("CPU_SS_ENC=", cpu_res.ss_enc, 32);
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print_hex("CPU_SS_DEC=", cpu_res.ss_dec, 32);
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print_hex("DMA_EK32=", dma_res.ek, 32);
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print_hex("DMA_SS_ENC=", dma_res.ss_enc, 32);
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print_hex("DMA_SS_DEC=", dma_res.ss_dec, 32);
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printf("MLKEM_CPU_CYCLES=%lu\n", cpu_cycles);
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printf("MLKEM_DMA_CYCLES=%lu\n", dma_cycles);
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printf("MLKEM_CPU_US=%lu\n", cycles_to_us(cpu_cycles));
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printf("MLKEM_DMA_US=%lu\n", cycles_to_us(dma_cycles));
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if (dma_cycles != 0) {
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unsigned long speedup_x100 = (cpu_cycles * 100u) / dma_cycles;
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printf("MLKEM_DMA_SPEEDUP_X100=%lu\n", speedup_x100);
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}
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if (mismatch_cpu == 0 && mismatch_dma == 0 && result_diff == 0)
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printf("MLKEM_RESULT=PASS\n");
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else {
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printf("MLKEM_RESULT=FAIL cpu_mismatch=%d dma_mismatch=%d result_diff=%d\n",
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mismatch_cpu, mismatch_dma, result_diff);
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}
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printf("MLKEM_DONE\n");
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return 0;
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}
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