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ciciec2026/fpga/run_impl.tcl

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769 B
Tcl

# bit.tcl
open_project project/Loongson_Soc.xpr
# Add myCPU
# add_files -scan_for_includes mysrc
# Add xilinx_ip in myCPU
# add_files -quiet [glob -nocomplain mysrc/xilinx_ip/*/*.xci]
# add_files -quiet [glob -nocomplain mysrc/xilinx_ip/*/*.xcix]
# Upgrade IPs
upgrade_ip -quiet [get_ips]
# run_impl
launch_runs impl_1
wait_on_run impl_1
# check impl status
if {[get_property PROGRESS [get_runs impl_1]] != "100%"} {
puts "ERROR: Implementation failed!"
exit 1
}
# open_run impl_1
open_run impl_1
report_utilization -file project/dsp_utilization.rpt -pb project/dsp_utilization.pb
# report_timing_summary -delay_type min_max -report_unconstrained \
# -file lab/lab1.runs/impl_1/timing_summary.rpt
close_project
exit 0