FallenSigh
e35fa5884d
The open-la500 core has USE_CACHE enabled. Writes to 0x1c400000 go to the write-back data cache and never reach the SRAM model before the testbench checks ExtRAM. Use the 0xA0000000 uncached segment (same pattern as fft_dma/main.c).
16 lines
480 B
C
16 lines
480 B
C
#pragma once
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#define FFT_BASE 0xbf400000
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#define FFT_IN_RE_BASE (FFT_BASE + 0x1000)
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#define FFT_IN_IM_BASE (FFT_BASE + 0x2000)
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#define FFT_OUT_RE_BASE (FFT_BASE + 0x3000)
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#define FFT_OUT_IM_BASE (FFT_BASE + 0x4000)
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#define FFT_CSR_REG (FFT_BASE + 0xF000)
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#define FFT_CTRL_START (1 << 4)
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#define FFT_STAT_DONE (1 << 1)
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#define FFT_STAT_BUSY (1 << 0)
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#define FFT_POINT_NUM 1024
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void fft_start();
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void fft_wait();
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unsigned int fft_get_csr(); |