1492 lines
408 KiB
Plaintext
1492 lines
408 KiB
Plaintext
Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
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| Tool Version : Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
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| Date : Sun Jul 5 23:38:35 2026
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| Host : fedora running 64-bit unknown
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| Command : report_control_sets -verbose -file ./vivado_reports/impl_control_sets.rpt
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| Design : soc_top
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| Device : xc7a200t
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Control Set Information
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Table of Contents
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-----------------
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1. Summary
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2. Histogram
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3. Flip-Flop Distribution
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4. Detailed Control Set Information
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1. Summary
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----------
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+----------------------------------------------------------+-------+
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| Status | Count |
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+----------------------------------------------------------+-------+
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| Total control sets | 1413 |
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| Minimum number of control sets | 1413 |
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| Addition due to synthesis replication | 0 |
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| Addition due to physical synthesis replication | 0 |
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| Unused register locations in slices containing registers | 1981 |
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+----------------------------------------------------------+-------+
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* Control sets can be merged at opt_design using control_set_merge or merge_equivalent_drivers
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** Run report_qor_suggestions for automated merging and remapping suggestions
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2. Histogram
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------------
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+--------------------+-------+
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| Fanout | Count |
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+--------------------+-------+
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| Total control sets | 1413 |
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| >= 0 to < 4 | 9 |
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| >= 4 to < 6 | 42 |
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| >= 6 to < 8 | 14 |
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| >= 8 to < 10 | 453 |
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| >= 10 to < 12 | 17 |
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| >= 12 to < 14 | 269 |
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| >= 14 to < 16 | 7 |
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| >= 16 | 602 |
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+--------------------+-------+
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* Control sets can be remapped at either synth_design or opt_design
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3. Flip-Flop Distribution
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-------------------------
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+--------------+-----------------------+------------------------+-----------------+--------------+
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| Clock Enable | Synchronous Set/Reset | Asynchronous Set/Reset | Total Registers | Total Slices |
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+--------------+-----------------------+------------------------+-----------------+--------------+
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| No | No | No | 1039 | 0 |
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| No | No | Yes | 2280 | 0 |
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| No | Yes | No | 1323 | 0 |
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| Yes | No | No | 7517 | 0 |
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| Yes | No | Yes | 23344 | 0 |
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| Yes | Yes | No | 3100 | 0 |
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+--------------+-----------------------+------------------------+-----------------+--------------+
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4. Detailed Control Set Information
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-----------------------------------
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+---------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------+------------------+----------------+
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| Clock Signal | Enable Signal | Set/Reset Signal | Slice Load Count | Bel Load Count |
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+---------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------+------------------+----------------+
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| u_mlkem_axi_slave/mlkem_clk | | | 0 | 2 |
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| pll_clk.u_clk_pll/inst/sys_clk | | pll_clk.u_rst_cpu/p_0_in | 0 | 2 |
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| pll_clk.u_clk_pll/inst/sys_clk | | pll_clk.u_rst_sys/delay[1]_i_1_n_0 | 0 | 2 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/exe_stage/ds_to_es_bus_r0 | u_cpu/id_stage/fs_to_ds_bus_r_reg[55]_3 | 0 | 2 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axi4WriteOnlyArbiter_7/cmdRouteFork_translated_fifo/fifo/axi4WriteOnlyArbiter_7_cmdArbiter_io_output_fork2_logic_linkEnable_1_reg | | 0 | 2 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axi4WriteOnlyArbiter_6/cmdRouteFork_translated_fifo/fifo/axi4WriteOnlyArbiter_6_cmdArbiter_io_output_fork2_logic_linkEnable_1_reg | | 0 | 2 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axi4WriteOnlyArbiter_5/cmdArbiter/toplevel_axiIn_1_writeOnly_decoder_io_outputs_1_aw_rValid_reg | | 0 | 2 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axi4WriteOnlyArbiter_4/cmdRouteFork_translated_fifo/fifo/axi4WriteOnlyArbiter_4_cmdArbiter_io_output_fork2_logic_linkEnable_1_reg | | 0 | 2 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/FSM_sequential_state[2]_i_1__0_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 3 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/receiver/fifo_rx/bottom[3]_i_1__0_n_0 | u_axi_uart_controller/uart0/regs/receiver/fifo_rx/fifo | 0 | 4 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/receiver/fifo_rx/top[3]_i_1__0_n_0 | u_axi_uart_controller/uart0/regs/receiver/fifo_rx/fifo | 0 | 4 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/transmitter/fifo_tx/top[3]_i_2_n_0 | u_axi_uart_controller/uart0/regs/transmitter/fifo_tx/top[3]_i_1_n_0 | 0 | 4 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/receiver/FSM_sequential_rstate[3]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 4 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/transmitter/fifo_tx/bottom[3]_i_1_n_0 | u_axi_uart_controller/uart0/regs/transmitter/fifo_tx/top[3]_i_1_n_0 | 0 | 4 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/receiver/rcounter16[3]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 4 |
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| pll_clk.u_clk_pll/inst/sys_clk | | u_axi_uart_controller/AA_axi2apb_bridge_cpu/apb_s_wstrb[3]_i_1_n_0 | 0 | 4 |
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| pll_clk.u_clk_pll/inst/sys_clk | | u_axi_uart_controller/uart0/regs/msr[3]_i_1_n_0 | 0 | 4 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_Axi_CDC/rFifo/popCC_addressGen_rValid_reg_0 | u_Axi_CDC/bFifo/bufferCC_12/buffers_1_reg_0 | 0 | 4 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_Axi_CDC/rFifo/pushToPopGray_buffercc/E[0] | u_Axi_CDC/bFifo/bufferCC_12/buffers_1_reg_0 | 0 | 4 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/lcr_reg[7]_4[0] | pll_clk.u_rst_sys/p_0_in | 0 | 4 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/icache/main_state[4]_i_1_n_0 | u_cpu/reset | 0 | 4 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/dj_phase_reg[0][0] | pll_clk.u_rst_sys/p_0_in | 0 | 4 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[0][0] | pll_clk.u_rst_sys/p_0_in | 0 | 4 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/e_c0_hi[3]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 4 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/id_stage/ras_ptr_reg[3][0] | u_cpu/reset | 0 | 4 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_Axi_CDC/arFifo/sendRsp_reg_1[0] | | 0 | 4 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axiIn_0_writeOnly_decoder/errorSlave/pendingDataCounter_value_reg[1][0] | u_Axi_CDC/awFifo/bufferCC_12/buffers_1_reg_0 | 0 | 4 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axiIn_0_writeOnly_decoder/errorSlave/pendingDataCounter_value_reg[1]_1[0] | u_Axi_CDC/awFifo/bufferCC_12/buffers_1_reg_0 | 0 | 4 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/exe_stage/ds_to_es_bus_r0 | u_cpu/id_stage/fs_to_ds_bus_r_reg[55]_0 | 0 | 4 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/rr_ptr | pll_clk.u_rst_sys/p_0_in | 0 | 4 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/e_poly[3]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 4 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/reset_reg_6 | u_cpu/wb_stage/reset_reg_8 | 0 | 4 |
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| pll_clk.u_clk_pll/inst/cpu_clk | | pll_clk.u_rst_sys/p_0_in | 0 | 4 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/axi_bridge/io_push_fire | pll_clk.u_rst_cpu/p_0_in | 0 | 5 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_6[0] | pll_clk.u_rst_sys/p_0_in | 0 | 5 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/receiver/fifo_rx/count[4]_i_1__1_n_0 | u_axi_uart_controller/uart0/regs/receiver/fifo_rx/fifo | 0 | 5 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 5 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/cfg_op | pll_clk.u_rst_sys/p_0_in | 0 | 5 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ws_valid_reg_31 | u_cpu/reset | 0 | 5 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/dcache/main_state | u_cpu/reset | 0 | 5 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/axi_bridge/io_push_fire_1 | pll_clk.u_rst_cpu/p_0_in | 0 | 5 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_prng_axi_slave/E[0] | pll_clk.u_rst_sys/p_0_in | 0 | 5 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/transmitter/fifo_tx/count[4]_i_1__0_n_0 | u_axi_uart_controller/uart0/regs/transmitter/fifo_tx/top[3]_i_1_n_0 | 0 | 5 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/E[0] | pll_clk.u_rst_sys/p_0_in | 0 | 5 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_keccak/cnt_r[4]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 5 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/pipe_cnt[4]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 5 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axiIn_1_writeOnly_decoder/p_14_in | pll_clk.u_rst_sys/p_0_in | 0 | 5 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axiIn_1_readOnly_decoder/E[0] | pll_clk.u_rst_sys/p_0_in | 0 | 5 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/s_axi_rid[4]_i_1__0_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 5 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/transmitter/counter[4]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 5 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/receiver/rshift[4]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 5 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/u_core_engine/axis_fifo_u0/u_fifo/E[0] | pll_clk.u_rst_sys/p_0_in | 0 | 6 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[0]_rep_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 6 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axiIn_1_writeOnly_decoder/pendingDataCounter_value_reg[1]_1 | pll_clk.u_rst_sys/p_0_in | 0 | 6 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/u_core_engine/FSM_onehot_ext_rd_state_reg[0][0] | pll_clk.u_rst_sys/p_0_in | 0 | 6 |
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| pll_clk.u_clk_pll/inst/sys_clk | | u_axi_uart_controller/AA_axi2apb_bridge_cpu/SR | 0 | 6 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/reset_reg_12 | u_cpu/reset | 0 | 6 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/reset_reg_5 | | 0 | 6 |
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| pll_clk.u_clk_pll/inst/cpu_clk | u_Axi_CDC/wFifo/popToPushGray_buffercc/io_push_fire | pll_clk.u_rst_cpu/p_0_in | 0 | 7 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_rd_inst/id_reg[3]_i_1_n_0 | | 0 | 7 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/io_push_fire | pll_clk.u_rst_sys/p_0_in | 0 | 7 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_4[0] | pll_clk.u_rst_sys/p_0_in | 0 | 7 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/k_r0 | pll_clk.u_rst_sys/p_0_in | 0 | 7 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/td_ph_reg[1][0] | pll_clk.u_rst_sys/p_0_in | 0 | 7 |
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| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/E[0] | pll_clk.u_rst_sys/p_0_in | 0 | 7 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/m_oidx_reg[6][0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[695]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[687]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[679]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[703]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[671]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[799]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[711]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[663]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[719]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[71]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[727]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[735]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[743]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[751]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[759]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[767]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[775]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[783]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[791]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[175] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
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| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[543]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[431]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[439]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[447]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[455]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[463]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[471]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[479]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[47]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[487]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[495]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[503]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[511]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[519]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[527]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[535]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[655]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[551]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[559]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[55]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[567]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[575]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[583]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[591]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[599]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[607]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[615]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[623]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[631]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[639]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[63]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[647]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[975]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[887]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[895]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[903]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[911]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[919]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[927]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[935]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[943]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[951]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[79] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[959]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[95]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[967]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[87] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[983]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[991]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[999]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/td_b0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/td_b1 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/td_b2 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[7] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[15] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[23] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[31] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[55] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[39] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[135] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[7]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[807]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[815]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[823]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[831]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[47] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[63] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[167] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[159] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[71] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[151] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[839]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[143] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[79]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[847]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[127] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[119] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[855]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[863]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[871]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[183] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[879]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[111] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[87]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[103] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[95] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[20] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[9] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[7] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[8] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[10] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[11] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[12] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[13] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[14] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[15] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[16] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[17] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[18] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[19] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[6] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[21] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[22] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[23] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[24] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[25] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[26] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[27] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[28] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[29] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[30] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[4]_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/u_pending_reg[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/valid_o_r_reg[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[1]_2[6] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[119]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/u_oidx_reg[4]_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_cbd/coeff_cnt[7]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/E[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/c_busy_reg[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/cp_ph_reg[2][0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/em_ridx_reg[8][0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[1]_2[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[1]_2[1] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[1]_2[2] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[1]_2[3] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[1]_2[4] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[1]_2[5] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[1007]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[1]_2[9] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[1]_2[7] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[1]_2[8] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[1]_2[10] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[1]_2[11] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/men_idx_reg[4][0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[1] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[2] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[3] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[4] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_14[5] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[327]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[239]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[23]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[247]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[255]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[263]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[271]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[279]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[287]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[295]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[303]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[311]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[319]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[231]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[335]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[343]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[351]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[359]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[367]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[375]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[383]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[391]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[399]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[39]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[407]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[415]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[135]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[1015]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[1023]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[1031]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[1039]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[103]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[1047]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[1055]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[1063]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[1071]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[1079]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[1087]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[111]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[127]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[423]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[143]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[151]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[159]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[15]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[167]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[175]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[183]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[191]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[199]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[207]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[215]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dj_block_r[223]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[183]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[231] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[239] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[247] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[255] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/e_c1_hi[7]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[119]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[135]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[143]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[151]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[159]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[15]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[167]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[175]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[223] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[191]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[199]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[23]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[247]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[39]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[47]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[55]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[63]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[71]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/hek_r[7]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/rho_r[255]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | | u_cpu/u_div/tmp_r | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[111] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[7] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[15] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[23] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[31] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[39] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[47] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[55] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[79] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[63] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[71] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[87] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[95] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[103] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | pll_clk.u_rst_sys/Q[0] | | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[119] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[127] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[135] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[143] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[151] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[159] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[167] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[175] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[183] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[191] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[199] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[207] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/z_r[215] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/reg_datai[7]_i_2_n_0 | u_axi_uart_controller/AA_axi2apb_bridge_cpu/reg_datai[7]_i_1_n_0 | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/seq_busy_reg_0[3] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/seq_busy_reg_1[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/seq_busy_reg_1[1] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/seq_busy_reg_1[2] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/seq_busy_reg_1[3] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/r_cnt[7]_i_2_n_0 | u_matmul_axi_slave/r_cnt[7]_i_1_n_0 | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/bulk_word[31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/bulk_word[23]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/bulk_word[15]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/transmitter/tf_data_bak[7]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/transmitter/E[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/block_cnt[7]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/dl[23]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/seq_busy_reg_0[2] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/lcr_reg[7][0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/lcr_reg[7]_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/lcr_reg[7]_2[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/lcr_reg[7]_3[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/reg_datao_32[7] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/reg_datao_32[15] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/reg_datao_32[23] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/reg_datao_32[31] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/reg_enable_reg_2[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axiIn_1_writeOnly_decoder/FSM_sequential_state_q_reg[1][0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axiIn_1_writeOnly_decoder/pendingDataCounter_value_reg[1]_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_fft_controller/ar_cnt[7]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_Axi_CDC/arFifo/sendRsp_reg_0[0] | | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[2]_4[1] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/u_core_engine/axis_fifo_u0/u_fifo/sendRsp_reg_0[0] | | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_prng_axi_slave/seed_mix[7]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_prng_axi_slave/seed_mix[31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/axi_bridge/awaddr[31]_i_1_n_0 | u_cpu/axi_bridge/awaddr[3]_i_1_n_0 | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_prng_axi_slave/seed_mix[23]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_prng_axi_slave/seed_mix[15]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | | u_axi_uart_controller/uart0/regs/sclk_count[7]_i_1_n_0 | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/r_cnt[7]_i_1__0_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[1]_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[1]_0[1] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[1]_0[2] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[1]_0[3] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[2]_4[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[1087] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[2]_4[2] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[2]_4[3] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/bulk_word[7]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[4]_1[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[4]_1[1] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[4]_1[2] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[4]_1[3] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/seq_busy_reg[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/seq_busy_reg[1] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/seq_busy_reg[2] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/seq_busy_reg[3] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/seq_busy_reg_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/seq_busy_reg_0[1] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[527] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[423] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[431] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[439] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[447] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[455] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[463] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[471] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[479] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[487] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[495] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[503] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[511] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[519] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[415] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[535] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[543] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[551] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[559] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[567] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[575] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[583] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[591] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[599] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[607] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[615] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[623] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[631] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[303] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[199] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[207] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[215] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[223] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[231] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[239] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[247] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[255] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[263] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[271] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[279] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[287] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[295] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[639] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[311] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[319] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[327] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[335] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[343] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[351] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[359] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[367] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[375] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[383] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[391] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[399] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[407] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[975] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[871] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[879] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[887] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[895] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[903] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[911] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[919] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[927] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[935] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[943] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[951] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[959] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[967] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[863] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[983] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[991] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[999] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[1007] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[1015] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[1023] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[1031] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[1039] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[1047] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[1055] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[1063] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[1071] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[1079] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[751] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[647] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[655] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[663] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[671] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[679] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[687] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[695] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[703] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[711] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[719] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[727] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[735] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[743] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[191] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[759] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[767] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[775] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[783] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[791] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[799] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[807] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[815] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[823] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[831] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[839] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[847] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/p_0_in__0[855] | pll_clk.u_rst_sys/p_0_in | 0 | 8 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_Axi_CDC/arFifo/sendRsp_reg[0] | pll_clk.u_rst_sys/p_0_in | 0 | 9 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/E[0] | pll_clk.u_rst_sys/p_0_in | 0 | 9 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_snt/coeff_cnt_r | pll_clk.u_rst_sys/p_0_in | 0 | 9 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/dj_phase_reg[0]_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 9 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axiIn_0_writeOnly_decoder/p_21_in | pll_clk.u_rst_sys/p_0_in | 0 | 9 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/axi_s_sel_rd53_out | pll_clk.u_rst_sys/p_0_in | 0 | 9 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/dlc1 | pll_clk.u_rst_sys/p_0_in | 0 | 9 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/h_phase_reg[1][0] | pll_clk.u_rst_sys/p_0_in | 0 | 9 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[1]_rep_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 9 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/n_pending_reg[0] | pll_clk.u_rst_sys/p_0_in | 0 | 9 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/m_loading_reg[0] | pll_clk.u_rst_sys/p_0_in | 0 | 9 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/u_loading_reg[0] | pll_clk.u_rst_sys/p_0_in | 0 | 9 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/transmitter/bit_counter[2]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 9 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/r_len | | 0 | 10 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/receiver/fifo_rx/E[0] | pll_clk.u_rst_sys/p_0_in | 0 | 10 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/reset_reg_2[0] | | 0 | 10 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/reset_reg_1[0] | | 0 | 10 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/reset_reg_0[0] | | 0 | 10 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[3]_rep_2[0] | pll_clk.u_rst_sys/p_0_in | 0 | 10 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/cmp_ph_reg[0] | pll_clk.u_rst_sys/p_0_in | 0 | 11 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/receiver/rf_data_in[10]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 11 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/layer[2]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 11 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/j[7]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 11 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_dvi/vdata | u_axi_dvi/vdata[11]_i_1_n_0 | 0 | 11 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | | u_axi_dvi/vdata | 0 | 11 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[0]_rep__0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 11 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/st_reg[4]_4[0] | pll_clk.u_rst_sys/p_0_in | 0 | 11 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dec_ba | pll_clk.u_rst_sys/p_0_in | 0 | 11 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_fft_controller/u_FFT/SU5/do_en | u_fft_mlkem_axi_slave/out_cnt[10]_i_1_n_0 | 0 | 11 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_fft_controller/u_in1/D[0] | u_fft_mlkem_axi_slave/out_cnt[10]_i_1_n_0 | 0 | 11 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[234][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[252][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[236][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[253][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[235][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[254][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[255][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[237][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[25][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[26][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[27][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[195][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[233][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[28][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[251][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[247][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[250][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[238][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[24][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[239][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[23][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[240][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[241][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[242][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[243][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[244][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[245][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[249][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[246][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[248][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[203][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[212][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[211][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[210][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[20][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[209][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[208][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[207][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[206][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[205][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[204][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[213][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[202][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[200][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[1][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[19][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[199][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[198][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[197][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[196][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[61][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[222][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[231][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[230][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[22][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[229][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[228][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[227][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[226][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[225][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[224][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[223][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[232][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[221][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[220][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[21][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[219][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[218][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[217][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[216][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[215][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[214][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[88][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[7][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[80][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[81][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[82][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[83][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[84][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[85][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[86][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[87][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[79][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[89][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[8][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[90][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[91][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[92][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[93][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[94][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[95][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[96][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[70][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[62][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[63][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[64][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[65][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[66][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[67][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[68][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[69][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[6][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[97][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[71][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[72][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[73][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[74][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[75][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[76][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[77][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[78][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[38][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[46][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[45][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[44][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[43][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[42][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[41][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[40][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[3][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[39][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[47][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[37][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[36][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[35][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[34][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[33][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[32][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[31][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[30][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[2][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[55][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[98][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[99][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[9][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[60][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[5][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[59][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[58][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[57][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[56][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[29][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[54][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[53][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[52][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[51][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[50][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[4][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[49][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[48][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[133][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[13][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[139][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[138][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[137][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/r_addr[0]_i_1__0_n_0 | | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[136][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[135][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[134][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[140][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[132][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[131][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[130][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[12][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[129][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[128][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[127][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[148][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/cd_valid72_out | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[154][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[153][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[152][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[151][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[150][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[14][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[149][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[126][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[147][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[146][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[145][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[144][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[143][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[142][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[141][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[104][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[111][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[110][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[10][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[109][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[108][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[107][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[106][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[105][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[112][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[103][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[102][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[101][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[100][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[0][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[201][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_comp/u_pipe/cd_vi_mux | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[119][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[125][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[124][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[123][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[122][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/w_addr[11]_i_1_n_0 | | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[121][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[120][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[11][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[193][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[118][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[117][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[116][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[115][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_rd_inst/m_axil_araddr_next | | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[114][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[113][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[180][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[168][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[169][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[16][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[170][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[172][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[173][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[174][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[175][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[176][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[192][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[177][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[178][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[179][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[17][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[171][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[191][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[190][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[18][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[181][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[182][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[183][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[184][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[185][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[189][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[186][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[187][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[107]_5[0] | u_cpu/reset | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[188][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[15][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[194][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/r_addr[11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[156][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[157][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[161][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/rdb_addr[11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg[11]_i_1_n_0 | | 0 | 12 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/pre_addr[11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[160][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[162][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[155][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[163][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[159][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[164][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[165][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[166][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dec_dc_valid58_out | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[167][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/cr[158][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 12 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_snt/coeff_o_r | pll_clk.u_rst_sys/p_0_in | 0 | 13 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/h_wb_idx | pll_clk.u_rst_sys/p_0_in | 0 | 13 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/bulk_addr_r[11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 14 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/icache/tagv_ram_way[1].u/E[0] | u_cpu/reset | 0 | 15 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_snt/grp_ptr_r | pll_clk.u_rst_sys/p_0_in | 0 | 15 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/r_burst[1]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 15 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_fft_controller/ar_len_reg | pll_clk.u_rst_sys/p_0_in | 0 | 15 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/zeta_idx[6]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 15 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/u_core_engine/bytes_to_4k_r[14]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 15 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_fft_controller/ar_addr_reg[15]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 16 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_comp/u_pipe/E[0] | pll_clk.u_rst_sys/p_0_in | 0 | 16 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/lcr_reg[7]_5 | | 0 | 16 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/dcache/way_d_reg_reg_r1_0_127_0_0_i_2_n_0 | | 0 | 16 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/dcache/way_d_reg_reg_r1_128_255_0_0_i_1_n_0 | | 0 | 16 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/comp_k | pll_clk.u_rst_sys/p_0_in | 0 | 16 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_fft_controller/aw_addr_reg[15]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 16 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/uart0/regs/receiver/fifo_rx/rfifo/rf_push_pulse | | 0 | 16 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/E[0] | pll_clk.u_rst_sys/p_0_in | 0 | 17 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/w_addr[15]_i_1_n_0 | | 0 | 18 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/ek_we33_out | pll_clk.u_rst_sys/p_0_in | 0 | 19 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/ct_we2_out | pll_clk.u_rst_sys/p_0_in | 0 | 19 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/reset_reg[0] | | 0 | 19 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/dkp_we_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 19 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | | u_axi_axil_adapter/axi_axil_adapter_wr_inst/delay_reg[1]_0 | 0 | 19 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[107]_4[0] | | 0 | 20 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_cbd/buf_ptr[10]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 20 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_rd_inst/burst_reg[7]_i_1__0_n_0 | | 0 | 20 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/axi_s_req_addr[19]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 20 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | | pll_clk.u_rst_cpu/p_0_in | 0 | 20 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[107]_3[0] | | 0 | 20 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_prng_axi_slave/awleft_reg | pll_clk.u_rst_sys/p_0_in | 0 | 20 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_ram/u_axi_sram_sp/req_addr_q[22]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 21 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/burst_reg[7]_i_1_n_0 | | 0 | 21 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/toplevel_axiIn_0_readOnly_decoder_io_outputs_3_ar_rValid_reg_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 21 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/toplevel_axiIn_0_readOnly_decoder_io_outputs_4_ar_rValid_reg_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 21 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | | u_Axi_CDC/bFifo/bufferCC_12/buffers_1_reg_0 | 0 | 22 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/dcache/miss_buffer_replace_way | u_cpu/reset | 0 | 22 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axiIn_1_writeOnly_decoder/pendingDataCounter_value_reg[1]_2[0] | pll_clk.u_rst_sys/p_0_in | 0 | 23 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/icache/tagv_ram_way[1].u/request_buffer_icacop_reg_0[0] | u_cpu/reset | 0 | 23 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/pre_byte_l | pll_clk.u_rst_sys/p_0_in | 0 | 23 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/u_core_engine/burst_actual_bytes | pll_clk.u_rst_sys/p_0_in | 0 | 23 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[69][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[14][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[44][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[45][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[157][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[155][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[46][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[154][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[153][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[151][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[43][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[149][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[148][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[147][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[47][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[48][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[49][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[4][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[50][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[42][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[41][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[40][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[3][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[39][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[38][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[37][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[34][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[33][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[32][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[31][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[30][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[2][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[29][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[28][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[66][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[86][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[87][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[88][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[8][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[143][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[145][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[146][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[91][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[93][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[94][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[96][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[98][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[99][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[9][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[67][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[26][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[65][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[64][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[63][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[62][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[61][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[5][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[59][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[58][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[57][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[56][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[55][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[54][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[53][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[52][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[51][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[212][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[203][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[204][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[205][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[209][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[169][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[20][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[167][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[211][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[200][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[213][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[214][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[165][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[163][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[162][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[160][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[159][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[217][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[16][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[17][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[19][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[183][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[185][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[186][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[187][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[18][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[190][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[192][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[195][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[199][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[196][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[197][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[198][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[237][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[25][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[255][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[254][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[253][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[252][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[250][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[249][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[248][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[247][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[246][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[245][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[241][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[240][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[23][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[239][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[89][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[235][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[234][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[233][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[231][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[230][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[22][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[227][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[226][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[225][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[224][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[221][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[220][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[21][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[219][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[218][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[193][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[210][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[208][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[207][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[206][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[202][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[201][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[1][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[194][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[215][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[191][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[189][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[188][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[184][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[182][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[181][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[180][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[238][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[36][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[35][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[27][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[251][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[24][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[244][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[243][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[242][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/td_we50_out | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[236][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[232][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[229][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[228][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[223][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[222][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[216][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[112][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[152][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[150][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[144][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[141][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[128][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[126][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[122][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[115][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[156][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[10][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[107][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[104][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[6][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/c0_reg | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[68][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/r_a | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[171][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[179][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[178][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[177][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[176][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[175][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[174][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[173][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[172][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[84][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[170][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[168][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[166][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[164][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[161][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[15][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[158][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[76][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[121][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[123][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[124][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[125][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[127][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[129][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[12][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[130][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[131][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[132][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[133][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[70][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[74][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[75][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[134][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[71][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[78][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[135][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[79][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[136][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[137][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[138][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[7][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[139][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[80][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[13][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[140][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[82][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[83][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[142][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[85][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[11][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[60][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[72][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[73][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[77][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[81][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[90][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[92][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[95][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_A[97][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[0][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[100][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[101][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[102][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[103][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[105][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[106][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[108][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[109][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[120][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[119][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[110][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[111][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[113][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[118][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[117][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[114][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/mem_B[116][11]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 24 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_snt/d1_r0 | pll_clk.u_rst_sys/p_0_in | 0 | 26 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[107]_7[0] | | 0 | 26 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[111]_0[0] | | 0 | 26 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/reset_reg_3[0] | | 0 | 27 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/reset_reg_4[0] | | 0 | 27 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/out_cnt[7]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 27 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[250]_0[0] | u_cpu/reset | 0 | 28 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[2][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[19][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[6][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[5][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[4][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[3][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[12][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[13][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[14][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[15][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[10][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[16][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[17][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[18][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[7][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[1][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[2][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[1][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[14][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[13][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[20][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[21][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[22][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[23][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[12][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[11][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[9][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[27][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[28][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[29][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[26][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[30][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[3][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[4][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[5][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[6][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[7][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[8][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[0][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[25][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/exe_stage/ds_to_es_bus_r_reg[222]_3[0] | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[24][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[0][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[10][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/btb_pc[11][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[9][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/ras_pc[8][29]_i_1_n_0 | | 0 | 30 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/axi_bridge/awaddr[31]_i_1_n_0 | | 0 | 31 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/reset_reg_14 | | 0 | 31 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/u_div/UnsignS[31]_i_1_n_0 | u_cpu/reset | 0 | 31 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/cp_ph_reg[1][0] | pll_clk.u_rst_sys/p_0_in | 0 | 31 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/dec_nbits | pll_clk.u_rst_sys/p_0_in | 0 | 31 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[8][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[2][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_confreg/write_int_en | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[3][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[4][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[5][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[6][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[7][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[7][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[9][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[0][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[10][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[8][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[9][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[6][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[13][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[14][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[15][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[1][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[2][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[3][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[4][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[5][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[12][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[0][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[12][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[13][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[14][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[10][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_confreg/write_timer_cmp | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_confreg/write_led | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_confreg/write_int_pol | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[5][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[12][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[13][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[14][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[15][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[1][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[2][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[3][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[4][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[11][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[6][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[7][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[8][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_b[9][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[0][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[10][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_a[11][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[2][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/msg_word[3][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/msg_word[4][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/msg_word[5][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/msg_word[6][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/msg_word[7][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/z_word[0][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/z_word[1][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/z_word[2][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/z_word[3][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[15][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[3][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/z_word[4][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/msg_word[2][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/z_word[5][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[1][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/u_core_engine/axis_fifo_u0/u_fifo/fwd_valid0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[8][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[7][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/z_word[6][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[6][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[5][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/z_word[7][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[4][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_prng_axi_slave/data_reads[31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[9][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_rd_inst/s_axil_arready_reg_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[15][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_rd_inst/s_axil_arready_reg[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[14][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[13][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[12][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[11][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[10][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[0][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/acc_valid_d4 | u_matmul_axi_slave/crc_reg[31]_i_1_n_0 | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/u_core_engine/src_axi_addr[0]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/u_core_engine/pending_bytes[31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/ep_axi_addr | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b0_a[1][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/b1_b[11][31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/d_word[0][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/d_word[1][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/d_word[2][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/d_word[3][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/d_word[4][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/d_word[5][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/d_word[6][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/d_word[7][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/msg_word[0][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/msg_word[1][31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[1][0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[2]_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[0]_2[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[0]_1[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[0]_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[3]_2[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[3]_1[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[3]_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[3][0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[2]_2[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[2]_1[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[2]_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[2][0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[1]_2[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[1]_1[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[1]_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_confreg/write_digital_data | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[0]_2[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[107]_6[0] | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[0]_1[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[0]_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/ch_req_reg[0][0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/E[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/axi_bridge/wdata[31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/if_stage/flush_inst_req_buffer | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/if_stage/br_target_inst_req_buffer[31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_confreg/write_int_edge | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/u_div/tmp_r[31]_i_2_n_0 | u_cpu/u_div/tmp_r | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/u_div/UnsignR | u_cpu/reset | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/exe_stage/E[0] | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ws_valid_reg_30[0] | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[2]_2[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_confreg/write_digital_ctrl | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/u_csr/csr_tval[31]_i_1_n_0 | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_cdma_matmul_bridge/groups_retired[31]_i_1_n_0 | u_axi_axil_adapter/axi_axil_adapter_wr_inst/delay_reg[1]_0 | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_cdma_matmul_bridge/cdma_rd_req_src[31]_i_1_n_0 | u_axi_axil_adapter/axi_axil_adapter_wr_inst/delay_reg[1]_0 | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[104]_0[0] | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[104]_1[0] | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[104]_2[0] | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[104]_3[0] | | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[107]_0[0] | u_cpu/reset | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[107]_1[0] | u_cpu/reset | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_uart_controller/AA_axi2apb_bridge_cpu/reg_datai_32 | u_axi_uart_controller/AA_axi2apb_bridge_cpu/reg_datai_32[31]_i_1_n_0 | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[2]_1[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_dvi/write_reg_en[3]_0 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_dvi/write_reg_en[2]_1 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[3]_1[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_dvi/write_reg_en[1]_2 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_dvi/write_reg_en[0]_3 | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_dvi/s_rdata[31]_i_2__0_n_0 | u_axi_dvi/s_rdata[31]_i_1__0_n_0 | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[3]_3[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[3]_2[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[3]_0[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_awaddr_reg_reg[2]_3[0] | pll_clk.u_rst_sys/p_0_in | 0 | 32 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_cdma_matmul_bridge/bank_store_pending_reg[0]_0 | pll_clk.u_rst_sys/p_0_in | 0 | 33 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_cdma_matmul_bridge/cdma_rd_req_src[31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 33 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/if_stage/fs_pc0 | u_cpu/reset | 0 | 33 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/ext_rd_addr_r | pll_clk.u_rst_sys/p_0_in | 0 | 33 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_confreg/s_rdata0 | pll_clk.u_rst_sys/p_0_in | 0 | 33 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/ext_wr_addr_r | pll_clk.u_rst_sys/p_0_in | 0 | 33 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_Axi_CDC/rFifo/pushToPopGray_buffercc/E[0] | | 0 | 34 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/axi_bridge/araddr[31]_i_1_n_0 | | 0 | 35 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | | u_Axi_CDC/awFifo/bufferCC_12/buffers_1_reg_0 | 0 | 35 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_9[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_22[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_21[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_4[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_20[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_23[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_8[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_7[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_6[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_5[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_30[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_3[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_29[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_28[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_27[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_26[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_25[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_24[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_2[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_wr_inst/m_axil_wdata_next | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_0[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_1[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_10[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_11[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_12[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_13[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_14[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_15[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_16[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_17[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_18[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/E[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/ms_to_ws_bus_r_reg[177]_19[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/btb/E[0] | | 0 | 36 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axiIn_0_writeOnly_decoder/errorSlave/pendingDataCounter_value_reg[1]_1[0] | | 0 | 37 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_axi_axil_adapter/axi_axil_adapter_rd_inst/s_axi_rid_reg[3]_i_1_n_0 | | 0 | 37 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/ext_wr_bytes_left[31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 39 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/u_core_engine/axis_fifo_u0/u_fifo/FSM_onehot_ext_rd_state_reg[1][0] | pll_clk.u_rst_sys/p_0_in | 0 | 39 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/icache/tagv_ram_way[1].u/fetch_en | | 0 | 40 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/ep_bytes_left[31]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 40 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/id_stage/p_1_in | | 0 | 40 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/u_core_engine/wr_start_edge | pll_clk.u_rst_sys/p_0_in | 0 | 43 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_AxiCrossbar_2x8/axi4WriteOnlyArbiter_4/cmdArbiter/axi4WriteOnlyArbiter_4_cmdArbiter_io_output_fork2_logic_linkEnable_0_reg[0] | pll_clk.u_rst_sys/p_0_in | 0 | 46 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/dcache/tagv_ram_way[0].u/E[0] | u_cpu/reset | 0 | 48 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | | u_axi_uart_controller/uart0/regs/receiver/fifo_rx/fifo | 0 | 48 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_Axi_CDC/arFifo/pushToPopGray_buffercc/E[0] | | 0 | 49 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_Axi_CDC/awFifo/pushToPopGray_buffercc/E[0] | | 0 | 49 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/stream_sel | pll_clk.u_rst_sys/p_0_in | 0 | 50 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_fft_mlkem_axi_slave/u_prng_axi_slave/arleft_reg[7]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 53 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/exe_stage/request_buffer_op | u_cpu/reset | 0 | 55 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/io_push_fire | | 0 | 56 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_Axi_CDC/wFifo/popToPushGray_buffercc/io_push_fire | | 0 | 56 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_cdma_matmul_bridge/bank_group_idx | u_axi_axil_adapter/axi_axil_adapter_wr_inst/delay_reg[1]_0 | 0 | 64 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_cdma_matmul_bridge/bank_group_idx[1][31]_i_1_n_0 | u_axi_axil_adapter/axi_axil_adapter_wr_inst/delay_reg[1]_0 | 0 | 64 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_cdma_matmul_bridge/load_next_dst_addr | pll_clk.u_rst_sys/p_0_in | 0 | 64 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_snix_axil_cdma_mux_8ch/u_core_engine/copied_bytes | pll_clk.u_rst_sys/p_0_in | 0 | 64 |
|
|
| u_mlkem_axi_slave/mlkem_clk | pll_clk.u_rst_sys/dj_wb_idx | | 0 | 69 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/axi_bridge/io_push_fire_1 | | 0 | 72 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/axi_bridge/io_push_fire | | 0 | 72 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/r_wa__0 | pll_clk.u_rst_sys/p_0_in | 0 | 77 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/we | | 0 | 96 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/axi_bridge/write_buffer_num[2]_i_1_n_0 | u_cpu/reset | 0 | 99 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/if_stage/E[0] | | 0 | 106 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_ntt/load_cnt[7]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 113 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_pmul/load_cnt__0 | pll_clk.u_rst_sys/p_0_in | 0 | 127 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | | u_cpu/reset | 0 | 159 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | | | 0 | 170 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/p_0_in__0 | | 0 | 176 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/p_0_in__0__0 | | 0 | 176 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/mem_stage/es_to_ms_bus_r0 | | 0 | 210 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/exe_stage/ds_to_es_bus_r0 | | 0 | 226 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/mem_stage/E[0] | | 0 | 232 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | u_matmul_axi_slave/m_in_b[0][31]_i_1_n_0 | | 0 | 256 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/rho_r1 | pll_clk.u_rst_sys/p_0_in | 0 | 256 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/dj_phase_reg[1]_1[0] | pll_clk.u_rst_sys/p_0_in | 0 | 256 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/mb_digest_r | pll_clk.u_rst_sys/p_0_in | 0 | 256 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/wb_stage/we_0 | | 0 | 260 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/r_r | pll_clk.u_rst_sys/p_0_in | 0 | 512 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_sha3/squeezed_state_r0 | pll_clk.u_rst_sys/p_0_in | 0 | 512 |
|
|
| pll_clk.u_clk_pll/inst/cpu_clk | u_cpu/u_mul/E[0] | | 0 | 716 |
|
|
| u_mlkem_axi_slave/mlkem_clk | | pll_clk.u_rst_sys/p_0_in | 0 | 1552 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/mb_state_r[1599]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 1600 |
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|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_keccak/busy_r_reg_1 | pll_clk.u_rst_sys/p_0_in | 0 | 1600 |
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|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_keccak/state_r[1599]_i_1_n_0 | pll_clk.u_rst_sys/p_0_in | 0 | 1600 |
|
|
| pll_clk.u_clk_pll/inst/sys_clk | | pll_clk.u_rst_sys/p_0_in | 0 | 1699 |
|
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| pll_clk.u_clk_pll/inst/sys_clk | | | 0 | 1961 |
|
|
| u_mlkem_axi_slave/mlkem_clk | u_fft_mlkem_axi_slave/u_mlkem_axi_slave/u_mlkem/u_keccak/E[0] | pll_clk.u_rst_sys/p_0_in | 0 | 2048 |
|
|
+---------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------+------------------+----------------+
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|