Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
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253
sdk/software/examples/matmul_test/main.c
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253
sdk/software/examples/matmul_test/main.c
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/**
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* matmul_test - Standalone test example for matmul_axi_slave IP
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*
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* Tests the 4x4 matrix multiplier IP at 0x1f500000 (axiOut_7).
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* Computes C = A x B using register-level access, then verifies
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* against a software reference matmul.
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*
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* Register map (byte offsets from MATMUL_BASE):
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* 0x000 CTRL [W] bit0=1 starts computation
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* 0x004 STATUS [R] bit2=error, bit1=done, bit0=busy
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* 0x008 SRC_BASE [R/W] source data base address
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* 0x00c DST_BASE [R/W] result data base address
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* 0x010 GROUP_NUM [R/W] number of matrix groups
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* 0x020 A_BASE [R/W] 16 words of matrix A (row-major)
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* 0x060 B_BASE [R/W] 16 words of matrix B (row-major)
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* 0x0a0 C_BASE [R] 48 words of result C (3 words per element)
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*/
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#include <stdio.h>
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#include <stdint.h>
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/* ─── BSP globals (required by common.mk / picolibc) ─────────────── */
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unsigned long UART_BASE = 0xbf000000;
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unsigned long CONFREG_TIMER_BASE = 0xbf20f100;
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unsigned long CONFREG_CLOCKS_PER_SEC = 50000000L;
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unsigned long CORE_CLOCKS_PER_SEC = 33000000L;
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/* ─── MATMUL IP register map ─────────────────────────────────────── */
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#define MATMUL_BASE 0x1f500000
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#define MATMUL_CTRL (MATMUL_BASE + 0x000)
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#define MATMUL_STATUS (MATMUL_BASE + 0x004)
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#define MATMUL_SRC_BASE (MATMUL_BASE + 0x008)
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#define MATMUL_DST_BASE (MATMUL_BASE + 0x00c)
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#define MATMUL_GROUP_NUM (MATMUL_BASE + 0x010)
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#define MATMUL_A_BASE (MATMUL_BASE + 0x020)
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#define MATMUL_B_BASE (MATMUL_BASE + 0x060)
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#define MATMUL_C_BASE (MATMUL_BASE + 0x0a0)
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/* CTRL bits */
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#define CTRL_START 0x1
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/* STATUS bits */
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#define STATUS_BUSY 0x1
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#define STATUS_DONE 0x2
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#define STATUS_ERROR 0x4
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/* ─── Convenience macros ─────────────────────────────────────────── */
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#define REG_WR(addr, val) (*(volatile uint32_t *)(addr) = (uint32_t)(val))
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#define REG_RD(addr) (*(volatile uint32_t *)(addr))
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/* ─── Test data ─────────────────────────────────────────────────────
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* Test group 0:
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* A = identity (4x4)
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* B = diagonal {2, 3, 4, 5}
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* Expected C = B (since identity * X = X)
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*
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* Test group 1:
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* A = [[1,2,0,0], [0,0,3,0], [0,0,0,4], [0,0,0,0]]
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* B = [[5,0,0,0], [6,0,0,0], [0,7,0,0], [0,0,8,0]]
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* Expected C computed by software reference below
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*
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* Each A/B is 16 uint32_t, row-major. Unused slots in sub-4x4 matrices
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* are 0 as specified.
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*/
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#define N_GROUPS 2
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static const uint32_t test_a[N_GROUPS][16] = {
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/* group 0: identity */
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{ 1, 0, 0, 0,
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0, 1, 0, 0,
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0, 0, 1, 0,
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0, 0, 0, 1 },
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/* group 1 */
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{ 1, 2, 0, 0,
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0, 0, 3, 0,
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0, 0, 0, 4,
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0, 0, 0, 0 },
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};
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static const uint32_t test_b[N_GROUPS][16] = {
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/* group 0: diagonal */
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{ 2, 0, 0, 0,
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0, 3, 0, 0,
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0, 0, 4, 0,
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0, 0, 0, 5 },
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/* group 1 */
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{ 5, 0, 0, 0,
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6, 0, 0, 0,
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0, 7, 0, 0,
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0, 0, 8, 0 },
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};
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/* ─── Software reference matmul ─────────────────────────────────────
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* Returns the 66-bit result element as two 32-bit halves:
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* words[0] = result[31:0]
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* words[1] = result[63:32]
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* words[2] = result[65:64] (only 2 bits, zero-extended to 32)
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*/
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static void matmul_ref_u32(
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const uint32_t a[16],
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const uint32_t b[16],
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uint32_t c_words[48])
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{
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int row, col, k;
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for (row = 0; row < 4; row++) {
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for (col = 0; col < 4; col++) {
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uint64_t acc = 0;
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for (k = 0; k < 4; k++) {
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acc += (uint64_t)a[row * 4 + k] * (uint64_t)b[k * 4 + col];
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}
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int idx = (row * 4 + col) * 3;
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c_words[idx + 0] = (uint32_t)(acc & 0xFFFFFFFFULL);
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c_words[idx + 1] = (uint32_t)((acc >> 32) & 0xFFFFFFFFULL);
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c_words[idx + 2] = (uint32_t)((acc >> 64) & 0x3ULL);
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}
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}
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}
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/* ─── Write 16 words of matrix data to the IP ────────────────────── */
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static void write_matrix(uint32_t base_addr, const uint32_t data[16])
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{
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int i;
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for (i = 0; i < 16; i++) {
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REG_WR(base_addr + i * 4, data[i]);
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}
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}
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/* ─── Read 48 words of result C from the IP ──────────────────────── */
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static void read_result(uint32_t c_words[48])
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{
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int i;
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for (i = 0; i < 48; i++) {
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c_words[i] = REG_RD(MATMUL_C_BASE + i * 4);
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}
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}
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/* ─── Wait until IP is done, return 0 on success, -1 on error ────── */
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static int wait_done(void)
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{
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while (1) {
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uint32_t status = REG_RD(MATMUL_STATUS);
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if (status & STATUS_ERROR) {
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printf("[ERROR] matmul IP reports error (status=0x%08lx)\n",
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(unsigned long)status);
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return -1;
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}
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if (status & STATUS_DONE) {
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return 0;
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}
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}
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}
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/* ─── Verify group result against expected C words ───────────────── */
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static int verify_group(int group, const uint32_t got[48],
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const uint32_t expected[48])
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{
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int i, errors = 0;
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for (i = 0; i < 48; i++) {
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if (got[i] != expected[i]) {
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if (errors < 8) {
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int elem = i / 3;
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int sub = i % 3; /* 0=low, 1=high, 2=overflow */
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const char *sub_name[] = {"low", "high", "ovf"};
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printf(" group%d C[%d][%d].%s: got 0x%08lx exp 0x%08lx\n",
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group, elem / 4, elem % 4, sub_name[sub],
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(unsigned long)got[i], (unsigned long)expected[i]);
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}
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errors++;
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}
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}
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if (errors > 8) {
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printf(" ... and %d more mismatches\n", errors - 8);
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}
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return errors;
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}
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/* ─── Main ────────────────────────────────────────────────────────── */
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int main(void)
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{
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int g, pass_count = 0, fail_count = 0;
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printf("\n===== MATMUL IP Test =====\n");
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printf("Base addr : 0x%08lx\n", (unsigned long)MATMUL_BASE);
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printf("Groups : %d\n", N_GROUPS);
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printf("===========================\n");
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/* Write group count */
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REG_WR(MATMUL_GROUP_NUM, N_GROUPS);
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/* For this register-level example, SRC_BASE / DST_BASE are
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* informational only (no DMA). Set them to 0. */
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REG_WR(MATMUL_SRC_BASE, 0);
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REG_WR(MATMUL_DST_BASE, 0);
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/* ── Run each test group ──────────────────────────────────── */
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for (g = 0; g < N_GROUPS; g++) {
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uint32_t expected_c[48];
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uint32_t got_c[48];
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int errs;
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printf("\n--- Group %d ---\n", g);
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printf("Loading A[16] and B[16] into IP...\n");
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write_matrix(MATMUL_A_BASE, test_a[g]);
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write_matrix(MATMUL_B_BASE, test_b[g]);
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/* Clear any stale done/error flags */
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REG_WR(MATMUL_STATUS, STATUS_DONE | STATUS_ERROR);
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printf("Starting computation (CTRL=0x%x)...\n", CTRL_START);
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REG_WR(MATMUL_CTRL, CTRL_START);
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printf("Waiting for done...\n");
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if (wait_done() != 0) {
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fail_count++;
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continue;
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}
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printf("Reading C[48] from IP...\n");
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read_result(got_c);
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printf("Computing software reference...\n");
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matmul_ref_u32(test_a[g], test_b[g], expected_c);
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printf("Verifying...\n");
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errs = verify_group(g, got_c, expected_c);
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if (errs == 0) {
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printf("Group %d: PASS\n", g);
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pass_count++;
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} else {
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printf("Group %d: FAIL (%d mismatches)\n", g, errs);
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fail_count++;
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}
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}
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/* ── Final report ─────────────────────────────────────────── */
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printf("\n============================\n");
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printf("RESULTS: %d passed, %d failed\n", pass_count, fail_count);
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if (fail_count == 0) {
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printf("ALL TESTS PASSED\n");
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} else {
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printf("SOME TESTS FAILED\n");
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}
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printf("============================\n");
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/* Signal completion to testbench via UART */
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printf("MATMUL_DONE\n");
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return (fail_count == 0) ? 0 : 1;
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}
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