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Use uncached ExtRAM access (0xBC400000) to bypass CPU data cache

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The open-la500 core has USE_CACHE enabled. Writes to 0x1c400000
go to the write-back data cache and never reach the SRAM model
before the testbench checks ExtRAM. Use the 0xA0000000 uncached
segment (same pattern as fft_dma/main.c).
This commit is contained in:
FallenSigh
2026-06-24 02:04:40 +08:00
parent b8a4fcc30b
commit e35fa5884d
14 changed files with 654 additions and 1 deletions
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11
sdk/software/examples/dma/Makefile Normal file
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@@ -0,0 +1,11 @@
TARGET = dma
CFLAGS += -O3 -g
C_SRCS := $(wildcard ./*.c )
OBJDIR = obj
COMMON_DIR = ../../bsp
GCC_DIR=../../../toolchains/loongson-gnu-toolchain-8.3-x86_64-loongarch32r-linux-gnusf-v2.0
PICOLIBC_DIR=../../../toolchains/picolibc
include ../../bsp/common.mk