Use uncached ExtRAM access (0xBC400000) to bypass CPU data cache

The open-la500 core has USE_CACHE enabled. Writes to 0x1c400000
go to the write-back data cache and never reach the SRAM model
before the testbench checks ExtRAM. Use the 0xA0000000 uncached
segment (same pattern as fft_dma/main.c).

sdk/software/bsp/include/fft.h

@@ -0,0 +1,16 @@
+#pragma once
+
+#define FFT_BASE          0xbf400000
+#define FFT_IN_RE_BASE    (FFT_BASE + 0x1000)
+#define FFT_IN_IM_BASE    (FFT_BASE + 0x2000)
+#define FFT_OUT_RE_BASE   (FFT_BASE + 0x3000)
+#define FFT_OUT_IM_BASE   (FFT_BASE + 0x4000)
+#define FFT_CSR_REG       (FFT_BASE + 0xF000)
+#define FFT_CTRL_START    (1 << 4)
+#define FFT_STAT_DONE     (1 << 1)
+#define FFT_STAT_BUSY     (1 << 0)
+#define FFT_POINT_NUM     1024
+
+void fft_start();
+void fft_wait();
+unsigned int fft_get_csr();