Fix matmul_base address: 0x1f500000 -> 0xbf500000
The open-la500 CPU maps 0xbfxx_xxxx to the peripheral address space (crossbar sees 0x1fxx_xxxx). FFT uses 0xbf400000, CONFREG uses 0xbf20f100, UART uses 0xbf000000. Matmul must follow the same convention.
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@@ -39,7 +39,7 @@ unsigned long CORE_CLOCKS_PER_SEC = 33000000L;
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#define DST_BASE (SRC_BASE + N_GROUPS * 32) /* result region start */
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#define DST_BASE (SRC_BASE + N_GROUPS * 32) /* result region start */
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/* ─── MATMUL IP register map ─────────────────────────────────────── */
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/* ─── MATMUL IP register map ─────────────────────────────────────── */
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#define MATMUL_BASE 0x1f500000
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#define MATMUL_BASE 0xbf500000
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#define MATMUL_CTRL (MATMUL_BASE + 0x000)
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#define MATMUL_CTRL (MATMUL_BASE + 0x000)
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#define MATMUL_STATUS (MATMUL_BASE + 0x004)
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#define MATMUL_STATUS (MATMUL_BASE + 0x004)
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