Interrupt-driven wait: matmul HWI2 + DMA HWI1 direct CPU lines

rtl/ip/confreg/confreg.v

@@ -91,7 +91,6 @@ module confreg #(
     input      [3 :0] touch_btn,
 
     input             uart0_int,
-    input             dma_finish,
     input             fft_finish,
     output            confreg_int
 );
@@ -384,7 +383,7 @@ always @(posedge aclk) begin
     end
 end
 
-assign int_in = {24'b0, dma_finish, fft_finish, uart0_int, timer_int, touch_btn_data};
+assign int_in = {24'b0, 1'b0, fft_finish, uart0_int, timer_int, touch_btn_data};
 
 int_ctrl u_int_ctrl (
     .clk       (aclk),

rtl/ip/matmul/matmul_axi_slave.v

@@ -103,7 +103,10 @@ module matmul_axi_slave (
     output     [1:0]  s_axi_rresp,
     output reg        s_axi_rlast,
     output reg        s_axi_rvalid,
-    input             s_axi_rready
+    input             s_axi_rready,
+
+    // Interrupt output (active high level, pulsed by calc_done)
+    output            intr
 );
 
     // ==========================================
@@ -459,4 +462,7 @@ module matmul_axi_slave (
         end
     end
 
+    // Interrupt: driven by done, cleared when software writes STATUS[1]
+    assign intr = done;
+
 endmodule