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add vivado reports

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FallenSigh
2026-07-06 00:03:57 +08:00
parent 34ce639f69
commit 65607badd2
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50
fpga/vivado_reports/impl_route_status.rpt Normal file
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Design Route Status
: # nets :
------------------------------------------- : ----------- :
# of logical nets.......................... : 158000 :
# of nets with no placed pins.......... : 157584 :
# of nets not needing routing.......... : 202 :
# of internally routed nets........ : 202 :
# of routable nets..................... : 0 :
# of nets with routing errors.......... : 214 :
# of nets with some unplaced pins.. : 214 :
# of nets with some unrouted pins.. : 160 :
------------------------------------------- : ----------- :
Nets with Routing Errors: (only the first 10 nets are listed)
GLOBAL_LOGIC0
Unplaced Pins -- only the first 10 are listed, use -show_all to get the full list:
axi4WriteOnlyArbiter_4/cmdRouteFork_translated_fifo/fifo/logic_ram_reg_0_3_0_0/DP/RADR2
axi4WriteOnlyArbiter_4/cmdRouteFork_translated_fifo/fifo/logic_ram_reg_0_3_0_0/DP/RADR3
axi4WriteOnlyArbiter_4/cmdRouteFork_translated_fifo/fifo/logic_ram_reg_0_3_0_0/DP/RADR4
axi4WriteOnlyArbiter_4/cmdRouteFork_translated_fifo/fifo/logic_ram_reg_0_3_0_0/DP/WADR2
axi4WriteOnlyArbiter_4/cmdRouteFork_translated_fifo/fifo/logic_ram_reg_0_3_0_0/DP/WADR3
axi4WriteOnlyArbiter_4/cmdRouteFork_translated_fifo/fifo/logic_ram_reg_0_3_0_0/DP/WADR4
axi4WriteOnlyArbiter_4/cmdRouteFork_translated_fifo/fifo/logic_ram_reg_0_3_0_0/SP/RADR2
axi4WriteOnlyArbiter_4/cmdRouteFork_translated_fifo/fifo/logic_ram_reg_0_3_0_0/SP/RADR3
axi4WriteOnlyArbiter_4/cmdRouteFork_translated_fifo/fifo/logic_ram_reg_0_3_0_0/SP/RADR4
axi4WriteOnlyArbiter_4/cmdRouteFork_translated_fifo/fifo/logic_ram_reg_0_3_0_0/SP/WADR2
UART_RX_IOBUF_inst/O
Unplaced Pin: u_axi_uart_controller/uart0/regs/i_uart_sync_flops/flop_0[0]_i_1/I3
UART_TX_IOBUF_inst/O
Unplaced Pins:
u_axi_uart_controller/uart0/regs/i_uart_sync_flops/flop_0[0]_i_1/I2
u_axi_uart_controller/uart0/regs/transmitter/error_time[0]_i_1/I0
u_axi_uart_controller/uart0/regs/transmitter/error_time[2]_i_2/I1
u_axi_uart_controller/uart0/regs/transmitter/fifo_tx/tx_error_i_1/I2
base_ram_data_IOBUF[0]_inst/O
Unplaced Pin: u_axi_ram/u_axi_sram_sp/mem_reg_i_251__0/I4
base_ram_data_IOBUF[10]_inst/O
Unplaced Pin: u_axi_ram/u_axi_sram_sp/mem_reg_i_182/I4
base_ram_data_IOBUF[11]_inst/O
Unplaced Pin: u_axi_ram/u_axi_sram_sp/mem_reg_i_177__0/I4
base_ram_data_IOBUF[12]_inst/O
Unplaced Pin: u_axi_ram/u_axi_sram_sp/mem_reg_i_169__0/I4
base_ram_data_IOBUF[13]_inst/O
Unplaced Pin: u_axi_ram/u_axi_sram_sp/mem_reg_i_159__0/I4
base_ram_data_IOBUF[14]_inst/O
Unplaced Pin: u_axi_ram/u_axi_sram_sp/mem_reg_i_152__0/I4
base_ram_data_IOBUF[15]_inst/O
Unplaced Pin: u_axi_ram/u_axi_sram_sp/mem_reg_i_355__0/I4