remove mlkem CDC; mlkem can now run at 50MHz
This commit is contained in:
@@ -5,14 +5,11 @@
|
||||
// ML-KEM: 0x0000..0x3fff
|
||||
// FFT: 0x8000..0xcfff
|
||||
// Route the low ML-KEM block to ML-KEM and the remaining accelerator window to
|
||||
// FFT.
|
||||
// FFT. ML-KEM runs in the same clock domain as this AXI slave.
|
||||
(* use_dsp = "no" *) module fft_mlkem_axi_slave (
|
||||
input clk,
|
||||
input resetn,
|
||||
|
||||
input mlkem_clk,
|
||||
input mlkem_resetn,
|
||||
|
||||
input [4:0] s_axi_awid,
|
||||
input [31:0] s_axi_awaddr,
|
||||
input [7:0] s_axi_awlen,
|
||||
@@ -116,7 +113,6 @@
|
||||
wire [1:0] mlkem_m_rresp;
|
||||
wire mlkem_m_rlast;
|
||||
wire mlkem_intr_m;
|
||||
(* async_reg = "true" *) reg [1:0] mlkem_intr_sync;
|
||||
|
||||
wire fft_awready, fft_wready, fft_bvalid;
|
||||
wire [4:0] fft_bid;
|
||||
@@ -178,97 +174,48 @@
|
||||
end
|
||||
end
|
||||
|
||||
always @(posedge clk or negedge resetn) begin
|
||||
if (!resetn)
|
||||
mlkem_intr_sync <= 2'b00;
|
||||
else
|
||||
mlkem_intr_sync <= {mlkem_intr_sync[0], mlkem_intr_m};
|
||||
end
|
||||
assign mlkem_intr = mlkem_intr_m;
|
||||
|
||||
assign mlkem_intr = mlkem_intr_sync[1];
|
||||
assign mlkem_awready = mlkem_m_awready;
|
||||
assign mlkem_wready = mlkem_m_wready;
|
||||
assign mlkem_bvalid = mlkem_m_bvalid;
|
||||
assign mlkem_bid = mlkem_m_bid;
|
||||
assign mlkem_bresp = mlkem_m_bresp;
|
||||
assign mlkem_arready = mlkem_m_arready;
|
||||
assign mlkem_rvalid = mlkem_m_rvalid;
|
||||
assign mlkem_rlast = mlkem_m_rlast;
|
||||
assign mlkem_rid = mlkem_m_rid;
|
||||
assign mlkem_rdata = mlkem_m_rdata;
|
||||
assign mlkem_rresp = mlkem_m_rresp;
|
||||
|
||||
Axi_CDC u_mlkem_axi_cdc (
|
||||
.axiInClk (clk),
|
||||
.axiInRstn (resetn),
|
||||
.axiOutClk (mlkem_clk),
|
||||
.axiOutRstn (mlkem_resetn),
|
||||
|
||||
.axiIn_awvalid (s_axi_awvalid && !write_active && (aw_sel == SEL_MLKEM)),
|
||||
.axiIn_awready (mlkem_awready),
|
||||
.axiIn_awaddr (s_axi_awaddr),
|
||||
.axiIn_awid (s_axi_awid),
|
||||
.axiIn_awlen (s_axi_awlen),
|
||||
.axiIn_awsize (s_axi_awsize),
|
||||
.axiIn_awburst (s_axi_awburst),
|
||||
.axiIn_awlock (s_axi_awlock),
|
||||
.axiIn_awcache (s_axi_awcache),
|
||||
.axiIn_awprot (s_axi_awprot),
|
||||
.axiIn_wvalid (s_axi_wvalid && (sel_w == SEL_MLKEM)),
|
||||
.axiIn_wready (mlkem_wready),
|
||||
.axiIn_wdata (s_axi_wdata),
|
||||
.axiIn_wstrb (s_axi_wstrb),
|
||||
.axiIn_wlast (s_axi_wlast),
|
||||
.axiIn_bvalid (mlkem_bvalid),
|
||||
.axiIn_bready (s_axi_bready && (sel_w == SEL_MLKEM)),
|
||||
.axiIn_bid (mlkem_bid),
|
||||
.axiIn_bresp (mlkem_bresp),
|
||||
.axiIn_arvalid (s_axi_arvalid && !read_active && (ar_sel == SEL_MLKEM)),
|
||||
.axiIn_arready (mlkem_arready),
|
||||
.axiIn_araddr (s_axi_araddr),
|
||||
.axiIn_arid (s_axi_arid),
|
||||
.axiIn_arlen (s_axi_arlen),
|
||||
.axiIn_arsize (s_axi_arsize),
|
||||
.axiIn_arburst (s_axi_arburst),
|
||||
.axiIn_arlock (s_axi_arlock),
|
||||
.axiIn_arcache (s_axi_arcache),
|
||||
.axiIn_arprot (s_axi_arprot),
|
||||
.axiIn_rvalid (mlkem_rvalid),
|
||||
.axiIn_rready (s_axi_rready && (sel_r == SEL_MLKEM)),
|
||||
.axiIn_rdata (mlkem_rdata),
|
||||
.axiIn_rid (mlkem_rid),
|
||||
.axiIn_rresp (mlkem_rresp),
|
||||
.axiIn_rlast (mlkem_rlast),
|
||||
|
||||
.axiOut_awvalid (mlkem_m_awvalid),
|
||||
.axiOut_awready (mlkem_m_awready),
|
||||
.axiOut_awaddr (mlkem_m_awaddr),
|
||||
.axiOut_awid (mlkem_m_awid),
|
||||
.axiOut_awlen (mlkem_m_awlen),
|
||||
.axiOut_awsize (mlkem_m_awsize),
|
||||
.axiOut_awburst (mlkem_m_awburst),
|
||||
.axiOut_awlock (mlkem_m_awlock),
|
||||
.axiOut_awcache (mlkem_m_awcache),
|
||||
.axiOut_awprot (mlkem_m_awprot),
|
||||
.axiOut_wvalid (mlkem_m_wvalid),
|
||||
.axiOut_wready (mlkem_m_wready),
|
||||
.axiOut_wdata (mlkem_m_wdata),
|
||||
.axiOut_wstrb (mlkem_m_wstrb),
|
||||
.axiOut_wlast (mlkem_m_wlast),
|
||||
.axiOut_bvalid (mlkem_m_bvalid),
|
||||
.axiOut_bready (mlkem_m_bready),
|
||||
.axiOut_bid (mlkem_m_bid),
|
||||
.axiOut_bresp (mlkem_m_bresp),
|
||||
.axiOut_arvalid (mlkem_m_arvalid),
|
||||
.axiOut_arready (mlkem_m_arready),
|
||||
.axiOut_araddr (mlkem_m_araddr),
|
||||
.axiOut_arid (mlkem_m_arid),
|
||||
.axiOut_arlen (mlkem_m_arlen),
|
||||
.axiOut_arsize (mlkem_m_arsize),
|
||||
.axiOut_arburst (mlkem_m_arburst),
|
||||
.axiOut_arlock (mlkem_m_arlock),
|
||||
.axiOut_arcache (mlkem_m_arcache),
|
||||
.axiOut_arprot (mlkem_m_arprot),
|
||||
.axiOut_rvalid (mlkem_m_rvalid),
|
||||
.axiOut_rready (mlkem_m_rready),
|
||||
.axiOut_rdata (mlkem_m_rdata),
|
||||
.axiOut_rid (mlkem_m_rid),
|
||||
.axiOut_rresp (mlkem_m_rresp),
|
||||
.axiOut_rlast (mlkem_m_rlast)
|
||||
);
|
||||
assign mlkem_m_awvalid = s_axi_awvalid && !write_active && (aw_sel == SEL_MLKEM);
|
||||
assign mlkem_m_awaddr = s_axi_awaddr;
|
||||
assign mlkem_m_awid = s_axi_awid;
|
||||
assign mlkem_m_awlen = s_axi_awlen;
|
||||
assign mlkem_m_awsize = s_axi_awsize;
|
||||
assign mlkem_m_awburst = s_axi_awburst;
|
||||
assign mlkem_m_awlock = s_axi_awlock;
|
||||
assign mlkem_m_awcache = s_axi_awcache;
|
||||
assign mlkem_m_awprot = s_axi_awprot;
|
||||
assign mlkem_m_wvalid = s_axi_wvalid && (sel_w == SEL_MLKEM);
|
||||
assign mlkem_m_wdata = s_axi_wdata;
|
||||
assign mlkem_m_wstrb = s_axi_wstrb;
|
||||
assign mlkem_m_wlast = s_axi_wlast;
|
||||
assign mlkem_m_bready = s_axi_bready && (sel_w == SEL_MLKEM);
|
||||
assign mlkem_m_arvalid = s_axi_arvalid && !read_active && (ar_sel == SEL_MLKEM);
|
||||
assign mlkem_m_araddr = s_axi_araddr;
|
||||
assign mlkem_m_arid = s_axi_arid;
|
||||
assign mlkem_m_arlen = s_axi_arlen;
|
||||
assign mlkem_m_arsize = s_axi_arsize;
|
||||
assign mlkem_m_arburst = s_axi_arburst;
|
||||
assign mlkem_m_arlock = s_axi_arlock;
|
||||
assign mlkem_m_arcache = s_axi_arcache;
|
||||
assign mlkem_m_arprot = s_axi_arprot;
|
||||
assign mlkem_m_rready = s_axi_rready && (sel_r == SEL_MLKEM);
|
||||
|
||||
mlkem_axi_slave u_mlkem_axi_slave (
|
||||
.clk (mlkem_clk),
|
||||
.resetn (mlkem_resetn),
|
||||
.clk (clk),
|
||||
.resetn (resetn),
|
||||
|
||||
.s_axi_awid (mlkem_m_awid),
|
||||
.s_axi_awaddr (mlkem_m_awaddr),
|
||||
|
||||
Reference in New Issue
Block a user