docs: rebuild system report and test workflow
This commit is contained in:
45
doc/reports/system/tools/collect_report_evidence.tcl
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45
doc/reports/system/tools/collect_report_evidence.tcl
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@@ -0,0 +1,45 @@
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# Usage from repository root:
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# vivado -mode batch -source doc/reports/system/tools/collect_report_evidence.tcl
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set script_dir [file dirname [file normalize [info script]]]
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set repo_root [file normalize [file join $script_dir ../../../..]]
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set xpr [file join $repo_root fpga project Loongson_Soc.xpr]
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set out_dir [file join $repo_root doc reports system evidence vivado]
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file mkdir $out_dir
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if {![file exists $xpr]} {
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puts stderr "ERROR: project not found: $xpr"
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puts stderr "Run: cd fpga && vivado -mode batch -source create_project.tcl"
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exit 2
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}
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open_project $xpr
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set run [get_runs impl_1]
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if {[get_property PROGRESS $run] ne "100%"} {
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puts stderr "ERROR: impl_1 is not complete; run fpga/run_impl.tcl first"
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close_project
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exit 3
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}
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open_run impl_1
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report_timing_summary -delay_type min_max -report_unconstrained -check_timing_verbose \
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-max_paths 20 -input_pins -file [file join $out_dir timing_summary_full.rpt]
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report_utilization -hierarchical -hierarchical_depth 4 \
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-file [file join $out_dir utilization_hierarchical.rpt]
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report_utilization -file [file join $out_dir utilization.rpt]
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report_power -file [file join $out_dir power.rpt]
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report_clock_interaction -delay_type min_max -file [file join $out_dir clock_interaction.rpt]
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report_cdc -details -file [file join $out_dir cdc.rpt]
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report_drc -file [file join $out_dir drc.rpt]
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report_methodology -file [file join $out_dir methodology.rpt]
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report_route_status -file [file join $out_dir route_status.rpt]
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set fp [open [file join $out_dir revision.txt] w]
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puts $fp "Evidence generated from implemented design."
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puts $fp "Vivado version: [version -short]"
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puts $fp "Project: $xpr"
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close $fp
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close_project
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puts "Report evidence written to: $out_dir"
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exit 0
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46
doc/reports/system/tools/run_fresh_impl.tcl
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46
doc/reports/system/tools/run_fresh_impl.tcl
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@@ -0,0 +1,46 @@
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# Force a clean implementation and generate the bitstream used by board tests.
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set script_dir [file dirname [file normalize [info script]]]
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set repo_root [file normalize [file join $script_dir ../../../..]]
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set xpr [file join $repo_root fpga project Loongson_Soc.xpr]
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set dsp_report [file join $repo_root fpga project dsp_utilization.rpt]
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if {![file exists $xpr]} {
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puts stderr "ERROR: project not found: $xpr"
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exit 2
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}
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open_project $xpr
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reset_run synth_1
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launch_runs synth_1
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wait_on_run synth_1
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set synth_run [get_runs synth_1]
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set synth_progress [get_property PROGRESS $synth_run]
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set synth_status [get_property STATUS $synth_run]
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puts "synth_1 progress: $synth_progress"
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puts "synth_1 status: $synth_status"
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if {$synth_progress ne "100%" || [string first "ERROR" [string toupper $synth_status]] >= 0} {
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puts stderr "ERROR: fresh synthesis failed"
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close_project
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exit 3
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}
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launch_runs impl_1 -to_step write_bitstream
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wait_on_run impl_1
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set run [get_runs impl_1]
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set progress [get_property PROGRESS $run]
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set status [get_property STATUS $run]
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puts "impl_1 progress: $progress"
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puts "impl_1 status: $status"
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if {$progress ne "100%" || [string first "ERROR" [string toupper $status]] >= 0} {
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puts stderr "ERROR: fresh implementation failed"
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close_project
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exit 4
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}
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open_run impl_1
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report_utilization -file $dsp_report
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close_project
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exit 0
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137
doc/reports/system/tools/run_report_tests.sh
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137
doc/reports/system/tools/run_report_tests.sh
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#!/usr/bin/env bash
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set -euo pipefail
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# Vivado 2019.2 invokes the host gcc while elaborating XSIM-generated C.
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# A read-only ccache directory otherwise surfaces only as XSIM 43-3409.
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export CCACHE_DISABLE=1
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SCRIPT_DIR="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)"
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ROOT="$(cd "$SCRIPT_DIR/../../../.." && pwd)"
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REPORT_DIR="$ROOT/doc/reports/system"
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EVIDENCE_DIR="$REPORT_DIR/evidence"
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SOFTWARE_EXAMPLES=(asm fft fft_dma mlkem_test mlkem_hello)
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find_vivado() {
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if [[ -n "${VIVADO:-}" && -x "${VIVADO}" ]]; then
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printf '%s\n' "$VIVADO"
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return 0
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fi
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if command -v vivado >/dev/null 2>&1; then
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command -v vivado
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return 0
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fi
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local candidate
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for candidate in \
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/opt/Xilinx/Vivado/2019.2/bin/vivado \
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/tools/Xilinx/Vivado/2019.2/bin/vivado; do
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if [[ -x "$candidate" ]]; then
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printf '%s\n' "$candidate"
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return 0
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fi
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done
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return 1
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}
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require_vivado() {
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if ! VIVADO_BIN="$(find_vivado)"; then
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echo "ERROR: Vivado not found." >&2
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echo "Set VIVADO=/path/to/Vivado/bin/vivado or source Vivado settings64.sh." >&2
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exit 127
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fi
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}
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usage() {
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cat <<'EOF'
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Usage: run_report_tests.sh <command>
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Commands:
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prepare Create evidence directories and Vivado project if absent
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lint Run the project-aware Verilator lint check
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build Build asm, fft, fft_dma, mlkem_test and mlkem_hello
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soc Build all five; simulate all except board-only asm
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implement Run Vivado implementation and collect PPA/CDC/DRC reports
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refresh Parse collected evidence, regenerate figures and build the PDF
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quick Run lint and refresh only; does not run Vivado implementation
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Board-only tests (matmul official 5000-group timing and reset behavior) are
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listed in REPORT_RERUN_CHECKLIST.md and are intentionally not automated here.
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EOF
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}
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prepare() {
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mkdir -p "$EVIDENCE_DIR/build" "$EVIDENCE_DIR/soc" \
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"$EVIDENCE_DIR/board" "$EVIDENCE_DIR/vivado"
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if [[ ! -f "$ROOT/fpga/project/Loongson_Soc.xpr" ]]; then
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require_vivado
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(cd "$ROOT/fpga" && "$VIVADO_BIN" -mode batch -source create_project.tcl)
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fi
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}
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lint() {
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prepare
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python3 "$ROOT/fpga/run-linter.py" "$ROOT/fpga/project/Loongson_Soc.xpr" \
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2>&1 | tee "$EVIDENCE_DIR/lint.log"
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}
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build_example() {
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local example="$1"
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local example_dir="$ROOT/sdk/software/examples/$example"
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local build_log="$EVIDENCE_DIR/build/$example.log"
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make -C "$example_dir" LA32RSOC_WINDOWS_HOME="$ROOT" clean \
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2>&1 | tee "$build_log"
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make -C "$example_dir" LA32RSOC_WINDOWS_HOME="$ROOT" all \
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2>&1 | tee -a "$build_log"
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}
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build() {
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prepare
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local example
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for example in "${SOFTWARE_EXAMPLES[@]}"; do
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build_example "$example"
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done
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}
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run_soc_case() {
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local example="$1"
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require_vivado
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build_example "$example"
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(cd "$ROOT/fpga" && "$VIVADO_BIN" -mode batch \
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-source "$SCRIPT_DIR/run_soc_sim.tcl") 2>&1 | tee "$EVIDENCE_DIR/soc/$example.log"
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}
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soc() {
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prepare
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build_example asm
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run_soc_case fft
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run_soc_case fft_dma
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run_soc_case mlkem_test
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run_soc_case mlkem_hello
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}
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implement() {
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prepare
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require_vivado
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"$VIVADO_BIN" -mode batch -source "$SCRIPT_DIR/run_fresh_impl.tcl" \
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2>&1 | tee "$EVIDENCE_DIR/vivado/implementation.log"
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"$VIVADO_BIN" -mode batch -source "$SCRIPT_DIR/collect_report_evidence.tcl" \
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2>&1 | tee "$EVIDENCE_DIR/vivado/collection.log"
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python3 "$ROOT/fpga/check_dsp.py" "$ROOT/fpga/project/dsp_utilization.rpt" 0 \
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2>&1 | tee "$EVIDENCE_DIR/vivado/dsp_check.log"
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}
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refresh() {
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make -C "$REPORT_DIR" metrics all
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}
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case "${1:-}" in
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prepare) prepare ;;
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lint) lint ;;
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build) build ;;
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soc) soc ;;
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implement) implement ;;
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refresh) refresh ;;
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quick) lint; refresh ;;
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*) usage; exit 2 ;;
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esac
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41
doc/reports/system/tools/run_soc_sim.tcl
Normal file
41
doc/reports/system/tools/run_soc_sim.tcl
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@@ -0,0 +1,41 @@
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# Runs the currently built sdk/axi_ram.mif with the generic SoC testbench.
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# The caller is responsible for building the desired software example first.
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set script_dir [file dirname [file normalize [info script]]]
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set repo_root [file normalize [file join $script_dir ../../../..]]
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set xpr [file join $repo_root fpga project Loongson_Soc.xpr]
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# xelab inherits this when compiling generated C files with the host gcc.
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set ::env(CCACHE_DISABLE) 1
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# Vivado 2019.2's bundled clang needs the matching 64-bit ncurses/tinfo pair.
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# On hosts that also carry /lib/libtinfo.so.5, the loader may otherwise mix it
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# with /lib64/libncurses.so.5 and fail with an unresolved _nc_tiparm symbol.
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if {[info exists ::env(LD_LIBRARY_PATH)] && $::env(LD_LIBRARY_PATH) ne ""} {
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append ::env(LD_LIBRARY_PATH) ":/lib64"
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} else {
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set ::env(LD_LIBRARY_PATH) "/lib64"
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}
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if {![file exists $xpr]} {
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puts stderr "ERROR: project not found: $xpr"
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exit 2
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}
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if {![file exists [file join $repo_root sdk axi_ram.mif]]} {
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puts stderr "ERROR: sdk/axi_ram.mif not found; build a software example first"
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exit 3
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}
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open_project $xpr
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set simset [get_filesets sim_1]
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set_property top tb_top $simset
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set_property incremental false $simset
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set_property xsim.elaborate.mt_level off $simset
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set_property xsim.elaborate.debug_level off $simset
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set_property xsim.simulate.log_all_signals false $simset
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update_compile_order -fileset sim_1
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launch_simulation
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run all
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close_sim
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close_project
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exit 0
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175
doc/reports/system/tools/update_report_metrics.py
Executable file
175
doc/reports/system/tools/update_report_metrics.py
Executable file
@@ -0,0 +1,175 @@
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#!/usr/bin/env python3
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"""Refresh report_metrics.tex from versioned Vivado and test evidence."""
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from __future__ import annotations
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import datetime as dt
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import re
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import subprocess
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from pathlib import Path
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REPORT_DIR = Path(__file__).resolve().parent.parent
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ROOT = REPORT_DIR.parents[2]
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METRICS = REPORT_DIR / "report_metrics.tex"
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def read_first(*paths: Path) -> str:
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for path in paths:
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if path.is_file():
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return path.read_text(encoding="utf-8", errors="replace")
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return ""
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def set_macro(text: str, name: str, value: str) -> str:
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pattern = re.compile(r"(\\newcommand\{\\" + re.escape(name) + r"\}\{)[^\n}]*(\})")
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if not pattern.search(text):
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raise ValueError(f"macro not found: {name}")
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return pattern.sub(lambda m: m.group(1) + value + m.group(2), text, count=1)
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def number(value: str) -> str:
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raw = value.replace(",", "").strip()
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if re.fullmatch(r"-?\d+", raw):
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return f"{int(raw):,}"
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return raw
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def capture(pattern: str, text: str, group: int = 1) -> str | None:
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match = re.search(pattern, text, re.MULTILINE)
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return match.group(group).strip() if match else None
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def update_timing(metrics: str, timing: str) -> str:
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summary = capture(r"^\s*(-?\d+\.\d+)\s+-?\d+\.\d+\s+\d+\s+\d+\s+", timing)
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if summary:
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metrics = set_macro(metrics, "OverallWNS", summary)
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for clock, prefix in (("cpu_clk", "Cpu"), ("sys_clk", "Sys"), ("mlkem_clk", "Mlkem")):
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freq = capture(r"^\s*" + clock + r"\s+\{[^\n]+?\}\s+\d+\.\d+\s+(\d+\.\d+)", timing)
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wns = capture(r"^\s*" + clock + r"\s+(-?\d+\.\d+)\s+", timing)
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if freq:
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metrics = set_macro(metrics, prefix + "FreqMHz", freq)
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if wns:
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metrics = set_macro(metrics, prefix + "WNS", wns)
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return metrics
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def update_util(metrics: str, util: str) -> str:
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rows = {
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"SliceLUTs": r"^\| Slice LUTs\s+\|\s*([\d,]+)\s*\|",
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"SliceFFs": r"^\| Slice Registers\s+\|\s*([\d,]+)\s*\|",
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"BramTiles": r"^\| Block RAM Tile\s+\|\s*([\d.]+)\s*\|",
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"DspCount": r"^\| DSPs?\s+\|\s*([\d,]+)\s*\|",
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}
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pct = {
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"SliceLUTPct": r"^\| Slice LUTs\s+\|[^\n]*\|\s*([\d.]+)\s*\|\s*$",
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"SliceFFPct": r"^\| Slice Registers\s+\|[^\n]*\|\s*([\d.]+)\s*\|\s*$",
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"BramPct": r"^\| Block RAM Tile\s+\|[^\n]*\|\s*([\d.]+)\s*\|\s*$",
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}
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for name, pattern in rows.items():
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value = capture(pattern, util)
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if value:
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metrics = set_macro(metrics, name, number(value))
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for name, pattern in pct.items():
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value = capture(pattern, util)
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if value:
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metrics = set_macro(metrics, name, value + r"\%")
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return metrics
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def update_power(metrics: str, power: str) -> str:
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mappings = {
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"TotalPower": r"\| Total On-Chip Power \(W\)\s*\|\s*([\d.]+)",
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"DynamicPower": r"\| Dynamic \(W\)\s*\|\s*([\d.]+)",
|
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"StaticPower": r"\| Device Static \(W\)\s*\|\s*([\d.]+)",
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}
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for name, pattern in mappings.items():
|
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value = capture(pattern, power)
|
||||
if value:
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metrics = set_macro(metrics, name, value)
|
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confidence = capture(r"\| Confidence Level\s*\|\s*([^|]+)\|", power)
|
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if confidence:
|
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metrics = set_macro(metrics, "PowerConfidence", confidence + "（未回标活动率）")
|
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return metrics
|
||||
|
||||
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def update_mlkem(metrics: str, log: str) -> str:
|
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names = {
|
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("512", "SW"): "MlkemFiveTwelveSW",
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("512", "CPU"): "MlkemFiveTwelveCPU",
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||||
("512", "DMA"): "MlkemFiveTwelveDMA",
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("768", "SW"): "MlkemSevenSixtyEightSW",
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("768", "CPU"): "MlkemSevenSixtyEightCPU",
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("768", "DMA"): "MlkemSevenSixtyEightDMA",
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("1024", "SW"): "MlkemTenTwentyFourSW",
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("1024", "CPU"): "MlkemTenTwentyFourCPU",
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("1024", "DMA"): "MlkemTenTwentyFourDMA",
|
||||
}
|
||||
for (level, path), name in names.items():
|
||||
value = capture(rf"^MLKEM{level}_{path}_ONLY_AVG_CYCLES=(\d+)$", log)
|
||||
if value:
|
||||
metrics = set_macro(metrics, name, number(value))
|
||||
return metrics
|
||||
|
||||
|
||||
def update_fft(metrics: str, cpu_log: str, dma_log: str) -> str:
|
||||
cpu_ns = capture(r"Hardware FFT Time:\s*(\d+) ns", cpu_log)
|
||||
dma_ns = capture(r"Hardware FFT Time:\s*(\d+) ns", dma_log)
|
||||
sw_ns = capture(r"Software FFT Time:\s*(\d+) ns", dma_log or cpu_log)
|
||||
cpu_speed = capture(r"Speedup Ratio\s*:\s*([\d.]+)x", cpu_log)
|
||||
dma_speed = capture(r"Speedup Ratio\s*:\s*([\d.]+)x", dma_log)
|
||||
for name, value in (("FftCpuNs", cpu_ns), ("FftDmaNs", dma_ns), ("FftSoftwareNs", sw_ns)):
|
||||
if value:
|
||||
metrics = set_macro(metrics, name, number(value))
|
||||
for name, value in (("FftCpuSpeedup", cpu_speed), ("FftDmaSpeedup", dma_speed)):
|
||||
if value:
|
||||
metrics = set_macro(metrics, name, value)
|
||||
err_match = re.search(r"Max Abs Error\s*:\s*Re=(\d+),\s*Im=(\d+)", dma_log)
|
||||
if err_match:
|
||||
metrics = set_macro(metrics, "FftMaxError", f"Re={err_match.group(1)}，Im={err_match.group(2)}")
|
||||
return metrics
|
||||
|
||||
|
||||
def update_matmul(metrics: str, log: str) -> str:
|
||||
elapsed = capture(r"Elapsed time:\s*([\d.]+) ms", log)
|
||||
score = capture(r"Score percent:\s*([\d.]+)", log)
|
||||
if elapsed:
|
||||
metrics = set_macro(metrics, "MatmulBoardMs", elapsed)
|
||||
if score:
|
||||
metrics = set_macro(metrics, "MatmulScore", score + r"\%")
|
||||
if "CRC32 matched." in log:
|
||||
metrics = set_macro(metrics, "MatmulCrcStatus", "PASS")
|
||||
return metrics
|
||||
|
||||
|
||||
def main() -> None:
|
||||
metrics = METRICS.read_text(encoding="utf-8")
|
||||
vivado = REPORT_DIR / "evidence" / "vivado"
|
||||
legacy = ROOT / "fpga" / "vivado_reports_nodsp"
|
||||
metrics = update_timing(metrics, read_first(vivado / "timing_summary_full.rpt", legacy / "timing_summary_full.rpt"))
|
||||
metrics = update_util(metrics, read_first(vivado / "utilization.rpt", legacy / "utilization.rpt"))
|
||||
metrics = update_power(metrics, read_first(vivado / "power.rpt", legacy / "power.rpt"))
|
||||
|
||||
soc = REPORT_DIR / "evidence" / "soc"
|
||||
metrics = update_mlkem(metrics, read_first(soc / "mlkem_test.log", ROOT / "sdk/software/examples/mlkem_test/result.txt"))
|
||||
metrics = update_fft(
|
||||
metrics,
|
||||
read_first(soc / "fft.log", ROOT / "sdk/software/examples/fft/result.txt"),
|
||||
read_first(soc / "fft_dma.log", ROOT / "sdk/software/examples/fft_dma/result.txt"),
|
||||
)
|
||||
metrics = update_matmul(metrics, read_first(REPORT_DIR / "evidence" / "board" / "matmul_official.log"))
|
||||
|
||||
try:
|
||||
revision = subprocess.check_output(
|
||||
["git", "-C", str(ROOT), "rev-parse", "--short", "HEAD"], text=True
|
||||
).strip()
|
||||
except (OSError, subprocess.CalledProcessError):
|
||||
revision = "unknown"
|
||||
source = "当前 evidence" if (vivado / "timing_summary_full.rpt").is_file() else "历史报告，待复测"
|
||||
metrics = set_macro(metrics, "EvidenceRevision", f"{revision}（{source}）")
|
||||
metrics = set_macro(metrics, "EvidenceDate", dt.date.today().isoformat())
|
||||
METRICS.write_text(metrics, encoding="utf-8")
|
||||
print(f"updated {METRICS}")
|
||||
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
Reference in New Issue
Block a user