FallenSigh
4c692e570a
Add ST_N stage: forward NTT (ntt_core mode=0, no scaling) of s[0],s[1], e[0],e[1] in place (slots S0,S1,E0,E1). Per slot: stream 256 coeffs into ntt_core during LOAD, collect 256 outputs back to same slot. n_pending waits for core IDLE between slots. Verified vs ml-kem-r golden: 1024/1024 shat/ehat coeffs exact (17318 cyc).
58 lines
2.4 KiB
Verilog
58 lines
2.4 KiB
Verilog
// tb_mlkem_kg_2d_xsim.v - Stage 2d: verify forward NTT of s/e in mlkem_top.
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// After ST_N, slots S0,S1,E0,E1 must hold shat_0,shat_1,ehat_0,ehat_1.
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// Golden: kg_c000_sehat.hex (4 polys x 256 = 1024 lines, mod-q).
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`timescale 1ns/1ps
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module tb_mlkem_kg_2d_xsim;
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reg clk=0, rst_n=0, start_i=0;
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reg [255:0] d_i, z_i=0;
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wire busy_o, done_o;
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reg [3:0] dbg_slot_i=0; reg [7:0] dbg_idx_i=0; wire [11:0] dbg_coeff_o;
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wire [255:0] dbg_rho_o, dbg_sigma_o;
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mlkem_top #(.K(2)) dut (
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.clk(clk), .rst_n(rst_n), .d_i(d_i), .z_i(z_i), .start_i(start_i),
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.busy_o(busy_o), .done_o(done_o),
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.dbg_slot_i(dbg_slot_i), .dbg_idx_i(dbg_idx_i), .dbg_coeff_o(dbg_coeff_o),
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.dbg_rho_o(dbg_rho_o), .dbg_sigma_o(dbg_sigma_o)
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);
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always #5 clk = ~clk;
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localparam [255:0] D_LIT = 256'h2426f1941779574d3f1b163bd57f7e173e229e630ec7f7073bdf365137c4bb6d;
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reg [11:0] gold [0:1023];
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reg [3:0] slot_of [0:3]; // S0,S1,E0,E1
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integer c, p, idx, errors, gi;
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initial begin
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$readmemh("sync_rtl/top/TB/vectors/kg_c000_sehat.hex", gold);
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slot_of[0]=4'd4; slot_of[1]=4'd5; slot_of[2]=4'd6; slot_of[3]=4'd7;
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d_i = D_LIT;
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rst_n=0; repeat(4) @(posedge clk); rst_n=1; @(posedge clk);
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start_i=1; @(posedge clk); start_i=0;
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c=0; while(!done_o && c<300000) begin @(posedge clk); c=c+1; end
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if(!done_o) begin $display("FAIL: timeout after %0d cyc", c); $finish; end
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$display("=== Stage 2d: NTT(s/e) -> shat/ehat === done in %0d cyc", c);
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errors = 0;
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for (p = 0; p < 4; p = p + 1) begin
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for (idx = 0; idx < 256; idx = idx + 1) begin
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dbg_slot_i = slot_of[p];
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dbg_idx_i = idx[7:0];
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@(posedge clk); @(posedge clk);
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gi = p*256 + idx;
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if (dbg_coeff_o !== gold[gi]) begin
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if (errors < 8)
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$display(" MISMATCH slot%0d[%0d]: got=%03x exp=%03x",
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slot_of[p], idx, dbg_coeff_o, gold[gi]);
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errors = errors + 1;
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end
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end
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end
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if (errors == 0) $display("ALL TESTS PASSED (1024/1024 shat/ehat coeffs)");
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else $display("TESTS FAILED: %0d mismatches", errors);
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$finish;
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end
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initial begin #10000000; $display("FAIL: global timeout"); $finish; end
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endmodule
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