FallenSigh
d4c3fc86fc
Add file-based vector testbenches ( + ) for: - mod_add_sync, rng_sync, poly_arith_sync, comp_decomp_sync - s_bram/sd_bram, sha3_chain_top - ntt_core, poly_mul_sync - sample_cbd_sync, sample_ntt_sync Each module includes: - tb_<module>_xsim.v: Vivado XSIM testbench - gen_vectors.py: Python vector generator (stdlib only) - vectors/<module>_input.hex: test input vectors - xsim_run.tcl: compile + elaborate + simulate script
154 lines
4.1 KiB
Python
154 lines
4.1 KiB
Python
#!/usr/bin/env python3
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"""gen_vectors.py - Generate test vectors for poly_arith_sync XSIM testbench.
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Produces sync_rtl/poly_arith/TB/vectors/poly_arith_input.hex
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Each line is a 40-bit hex value (10 hex chars, no spaces):
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bits[39:28] = expected[11:0]
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bits[27:16] = coeff_b_in[11:0]
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bits[15:4] = coeff_a_in[11:0]
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bit[3] = mode (0=add, 1=sub)
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bits[2:0] = padding (0)
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expected = (coeff_a +/- coeff_b) mod Q, Q = 3329
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Edge cases covered:
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- zeros
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- max values (Q-1 = 3328)
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- mid-range
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- overflow/underflow (a + b >= Q, a - b < 0)
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"""
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import os
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import sys
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Q = 3329
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Q_MINUS_1 = Q - 1 # 3328
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# Output path (relative to project root, where script should be run)
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OUTPUT_DIR = os.path.join(os.path.dirname(os.path.abspath(__file__)), "vectors")
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OUTPUT_FILE = os.path.join(OUTPUT_DIR, "poly_arith_input.hex")
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def mod_add(a: int, b: int) -> int:
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"""(a + b) mod Q."""
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return (a + b) % Q
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def mod_sub(a: int, b: int) -> int:
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"""(a - b) mod Q."""
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return (a - b) % Q
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def pack_vector(expected: int, coeff_b: int, coeff_a: int, mode: int) -> int:
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"""Pack a single test vector into a 40-bit value."""
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val = 0
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val |= (expected & 0xFFF) << 28 # bits 39:28
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val |= (coeff_b & 0xFFF) << 16 # bits 27:16
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val |= (coeff_a & 0xFFF) << 4 # bits 15:4
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val |= (mode & 0x1) << 3 # bit 3
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# bits 2:0 are padding = 0
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return val
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def generate() -> list[int]:
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"""Generate all test vectors. Returns list of packed 40-bit values."""
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vectors: list[int] = []
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# Helper to add a vector
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def add_vector(a: int, b: int, mode: int) -> None:
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if mode == 0:
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exp = mod_add(a, b)
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else:
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exp = mod_sub(a, b)
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vectors.append(pack_vector(exp, b, a, mode))
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# ---- ADD mode vectors (mode=0) ----
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# Zero + zero
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add_vector(0, 0, 0)
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# Max + max = (3328 + 3328) % 3329 = 6656 % 3329 = 3327
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add_vector(Q_MINUS_1, Q_MINUS_1, 0)
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# Zero + max
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add_vector(0, Q_MINUS_1, 0)
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add_vector(Q_MINUS_1, 0, 0)
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# Mid-range values
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for a, b in [(1000, 2000), (1500, 1500), (1, 2), (42, 137)]:
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add_vector(a, b, 0)
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# Overflow: a + b > Q
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add_vector(2000, 2000, 0) # 4000 % 3329 = 671
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add_vector(3000, 1000, 0) # 4000 % 3329 = 671
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add_vector(3328, 1, 0) # 3329 % 3329 = 0
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# Edge: Q-sized values that just fit
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add_vector(1664, 1665, 0) # 3329 -> 0
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add_vector(1664, 1664, 0) # 3328 -> 3328
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# ---- SUB mode vectors (mode=1) ----
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# Zero - zero
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add_vector(0, 0, 1)
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# Max - max
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add_vector(Q_MINUS_1, Q_MINUS_1, 1)
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# Zero - max: (0 - 3328) % 3329 = 1
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add_vector(0, Q_MINUS_1, 1)
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# Max - zero
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add_vector(Q_MINUS_1, 0, 1)
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# Mid-range values
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for a, b in [(2000, 1000), (1500, 1500), (2, 1), (137, 42)]:
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add_vector(a, b, 1)
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# Underflow: a < b -> negative result
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add_vector(1000, 2000, 1) # (1000 - 2000) % 3329 = 2329
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add_vector(0, 1, 1) # 3328
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add_vector(1, 3328, 1) # (1 - 3328) % 3329 = 2
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add_vector(0, 2, 1) # 3327
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# Edge cases
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add_vector(1, 3328, 1) # (1 - 3328) % 3329 = 2
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# Run through all combinations of a few edge values
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for a in [0, 1, 1664, 3327, 3328]:
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for b in [0, 1, 1664, 3327, 3328]:
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add_vector(a, b, 0)
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add_vector(a, b, 1)
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return vectors
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def write_vectors(vectors: list[int]) -> None:
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"""Write vectors to hex file."""
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os.makedirs(OUTPUT_DIR, exist_ok=True)
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with open(OUTPUT_FILE, "w") as f:
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for v in vectors:
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# 40 bits = 10 hex digits
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f.write(f"{v:010X}\n")
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print(f"Generated {len(vectors)} test vectors -> {OUTPUT_FILE}")
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def main() -> int:
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vectors = generate()
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write_vectors(vectors)
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# Print a few samples for debugging
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print("\nSample vectors (first 5):")
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for i, v in enumerate(vectors[:5]):
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exp = (v >> 28) & 0xFFF
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coeff_b = (v >> 16) & 0xFFF
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coeff_a = (v >> 4) & 0xFFF
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mode = (v >> 3) & 0x1
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op = "ADD" if mode == 0 else "SUB"
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print(f" [{i}] a={coeff_a:04d} b={coeff_b:04d} mode={op} expected={exp:04d}")
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return 0
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if __name__ == "__main__":
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sys.exit(main())
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