{
  "id": "vivado-verilog-tb",
  "name": "vivado-verilog-tb",
  "title": "编写所有模块的Vivado Verilog Testbench",
  "description": "",
  "status": "completed",
  "dev_type": null,
  "scope": null,
  "package": null,
  "priority": "P2",
  "creator": "FallenSigh",
  "assignee": "FallenSigh",
  "createdAt": "2026-06-25",
  "completedAt": "2026-06-25",
  "branch": null,
  "base_branch": "main",
  "worktree_path": null,
  "commit": null,
  "pr_url": null,
  "subtasks": [],
  "children": [],
  "parent": null,
  "relatedFiles": [],
  "notes": "",
  "meta": {}
}