This commit is contained in:
2026-07-11 17:21:21 +08:00
parent 47fbcd31b6
commit d8d57db82a
9 changed files with 504 additions and 316 deletions

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@@ -75,9 +75,10 @@ module comp_decomp_sync (
wire pipe_busy = valid_s0 | valid_s1 | valid_s2 | valid_s3 | valid_s4 | valid_s5;
// Accept a new command only when the pipeline and output slot are both free.
// Current users issue one coefficient at a time and wait for valid_o.
assign ready_o = !pipe_busy && (!valid_r || ready_i);
// Fully pipelined: accept one coefficient per cycle (B1). Every stage
// advances unconditionally and the sole consumer ties ready_i high, so the
// pipeline never needs to backpressure; streaming feeders issue 1 coeff/cyc.
assign ready_o = 1'b1;
assign coeff_out = data_r;
assign valid_o = valid_r;