Fix ML-KEM arithmetic timing paths

2026-07-07 18:28:47 +08:00
parent 2fb1cd67e3
commit 8c3f4317f5
12 changed files with 5030 additions and 63 deletions
--- a/create_project.tcl
+++ b/create_project.tcl
@@ -40,6 +40,7 @@ read_verilog -sv ${PROJECT_DIR}/sync_rtl/ntt/ntt_core.v

 # ── 多项式乘法 ──
 read_verilog -sv ${PROJECT_DIR}/sync_rtl/poly_mul/basecase_mul.v
+read_verilog -sv ${PROJECT_DIR}/sync_rtl/poly_mul/basecase_mul_pipe.v
 read_verilog -sv ${PROJECT_DIR}/sync_rtl/poly_mul/poly_mul_zeta_rom.v
 read_verilog -sv ${PROJECT_DIR}/sync_rtl/poly_mul/poly_mul_sync.v