fix(tb): fix Vivado 2019.2 compatibility and add run_tb.sh

- Replace -include_dirs . with -i . (Vivado 2019.2 syntax)
- Add --timescale 1ns/1ps to all xelab commands
- Add LD_PRELOAD comment for ncurses compatibility
- Add run_tb.sh convenience script
  Usage: ./run_tb.sh mod_add
         ./run_tb.sh --list
- Update spec with Vivado 2019.2 compatibility notes

sync_rtl/poly_arith/TB/xsim_run.tcl

@@ -1,3 +1,7 @@
+# NOTE: On some systems, you may need:
+#   export LD_PRELOAD=/usr/lib64/libtinfo.so.5
+# before running this script.
+
 # xsim_run.tcl - Vivado xsim compilation and simulation script for poly_arith_sync
 #
 # Compiles poly_arith_sync RTL + dependencies + testbench and runs simulation.
@@ -31,10 +35,10 @@ set TB_DIR   sync_rtl/poly_arith/TB
 puts "=== Compiling RTL sources for poly_arith_sync ==="
 
 # Common dependency (pipeline register)
-xvlog -sv -include_dirs . ${RTL_DIR}/common/pipeline_reg.v
+xvlog -sv -i . ${RTL_DIR}/common/pipeline_reg.v
 
 # DUT (poly_arith_sync) — uses `include "sync_rtl/common/defines.vh"
-xvlog -sv -include_dirs . ${DUT_DIR}/poly_arith_sync.v
+xvlog -sv -i . ${DUT_DIR}/poly_arith_sync.v
 
 # ================================================================
 # Step 2: Compile testbench
@@ -48,7 +52,7 @@ xvlog -sv ${TB_DIR}/tb_poly_arith_xsim.v
 # ================================================================
 puts "=== Elaborating snapshot ==="
 
-xelab tb_poly_arith_xsim -s tb_poly_arith_xsim
+xelab tb_poly_arith_xsim -s tb_poly_arith_xsim --timescale 1ns/1ps
 
 # ================================================================
 # Step 4: Run simulation