From 4997657d7e448fbe679155fab89821dcc07686be Mon Sep 17 00:00:00 2001 From: FallenSigh Date: Sat, 27 Jun 2026 21:04:57 +0800 Subject: [PATCH] test(comp_decomp): add ML-KEM-1024 d=11/d=5 compress/decompress cases Adds 4 Verilator cases covering d_u=11 and d_v=5 (ML-KEM-1024), which the RTL already supports (d is 5-bit, products fit 24 bits). comp_decomp now 120/120 vectors. Also ignore .omo/ session runtime cache and archive the 06-27-sha3-g-test-specific-input trellis task. Verified all 10 modules pass both frameworks: - Verilator: 4334/4334 vectors - XSIM (Vivado 2019.2): all 11 testbenches green, separate committed vectors Oracles independently cross-checked vs hashlib (G/H/J/PRF) and FIPS 203 Alg 7/8/9/10/12 (sample_ntt, sample_cbd, ntt, poly_mul). --- .gitignore | 3 ++ .trellis/.template-hashes.json | 32 ++++++++++++++++++- .../check.jsonl | 1 + .../implement.jsonl | 1 + .../06-27-sha3-g-test-specific-input/prd.md | 30 +++++++++++++++++ .../task.json | 26 +++++++++++++++ .../modules/comp_decomp/test_plan.json | 28 ++++++++++++++++ 7 files changed, 120 insertions(+), 1 deletion(-) create mode 100644 .trellis/tasks/06-27-sha3-g-test-specific-input/check.jsonl create mode 100644 .trellis/tasks/06-27-sha3-g-test-specific-input/implement.jsonl create mode 100644 .trellis/tasks/06-27-sha3-g-test-specific-input/prd.md create mode 100644 .trellis/tasks/06-27-sha3-g-test-specific-input/task.json diff --git a/.gitignore b/.gitignore index 7c58397..e5fd94a 100644 --- a/.gitignore +++ b/.gitignore @@ -30,3 +30,6 @@ xvlog.pb # OS .DS_Store Thumbs.db + +# Session runtime continuation cache +.omo/ diff --git a/.trellis/.template-hashes.json b/.trellis/.template-hashes.json index cf4969f..c86cd21 100644 --- a/.trellis/.template-hashes.json +++ b/.trellis/.template-hashes.json @@ -115,6 +115,36 @@ ".trellis/scripts/hooks/linear_sync.py": "e09cc4ce4699aada908808718698f33f705a3edf55c4dcf8f777ad892f80ca79", ".trellis/scripts/init_developer.py": "f9e6c0d882406e81c8cd6b1c5abb204b0befc0069ff89cf650cd536a80f8c60e", ".trellis/scripts/task.py": "40abdd46f5c2b6837610429a38eef50f1fc783fb1852dc4f52a891205e42ab04", - ".trellis/workflow.md": "f4b8a6f89017f62071986d6d36cc32c4c7f01fe6f023f0fd9311eddc57d8c94f" + ".trellis/workflow.md": "f4b8a6f89017f62071986d6d36cc32c4c7f01fe6f023f0fd9311eddc57d8c94f", + ".trellis/.runtime/sessions/opencode_ses_0fa9bd669ffeYrt7zm7OK1GYM8.json": "0057637c43c0458e064360a5cdfb047da4a4107cf3e91bdcf9dab39f909af4b0", + ".trellis/.runtime/update-check-claude_2ab4f024-6de1-48a9-a1e6-ae4f26b174a7.marker": "77c2ca150b61c7330da139378ffd3940d093f1bd74a1294689345d27e15b5124", + ".trellis/.runtime/update-check-claude_4ff99829-c447-424f-a6b9-a34607b049fa.marker": "77c2ca150b61c7330da139378ffd3940d093f1bd74a1294689345d27e15b5124", + ".trellis/.runtime/update-check-claude_d9118ffd-8f45-42ea-9801-d82379b3c23a.marker": "77c2ca150b61c7330da139378ffd3940d093f1bd74a1294689345d27e15b5124", + ".trellis/.runtime/update-check-opencode_ses_0fa9ba12affeWK76gGIDEf0tDZ.marker": "77c2ca150b61c7330da139378ffd3940d093f1bd74a1294689345d27e15b5124", + ".trellis/.runtime/update-check-opencode_ses_0fa9baae2ffeqp0asVrd8rcWFl.marker": "77c2ca150b61c7330da139378ffd3940d093f1bd74a1294689345d27e15b5124", + ".trellis/.runtime/update-check-opencode_ses_0fa9bd669ffeYrt7zm7OK1GYM8.marker": "77c2ca150b61c7330da139378ffd3940d093f1bd74a1294689345d27e15b5124", + ".trellis/.runtime/update-check-opencode_ses_0fff4a7a5ffeSofnz1j0YF4O56.marker": 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".trellis/scripts/common/__pycache__/workflow_phase.cpython-313.pyc": "eed71dc42941cbccbf2d4c38673c9ec465286a03163bcebc39e1c4ca0bbb3dab" } } \ No newline at end of file diff --git a/.trellis/tasks/06-27-sha3-g-test-specific-input/check.jsonl b/.trellis/tasks/06-27-sha3-g-test-specific-input/check.jsonl new file mode 100644 index 0000000..8f97ed3 --- /dev/null +++ b/.trellis/tasks/06-27-sha3-g-test-specific-input/check.jsonl @@ -0,0 +1 @@ +{"file": ".trellis/spec/rtl/xsim-tb-conventions.md", "reason": "检查 testbench 修改是否符合 XSIM 规范"} diff --git a/.trellis/tasks/06-27-sha3-g-test-specific-input/implement.jsonl b/.trellis/tasks/06-27-sha3-g-test-specific-input/implement.jsonl new file mode 100644 index 0000000..6696aa7 --- /dev/null +++ b/.trellis/tasks/06-27-sha3-g-test-specific-input/implement.jsonl @@ -0,0 +1 @@ +{"file": ".trellis/spec/rtl/xsim-tb-conventions.md", "reason": "遵循 XSIM testbench 编写规范：时钟、复位、DUT驱动协议"} diff --git a/.trellis/tasks/06-27-sha3-g-test-specific-input/prd.md b/.trellis/tasks/06-27-sha3-g-test-specific-input/prd.md new file mode 100644 index 0000000..d7118a3 --- /dev/null +++ b/.trellis/tasks/06-27-sha3-g-test-specific-input/prd.md @@ -0,0 +1,30 @@ +# 修改 sha3 TB 测试 G 模式指定输入 + +## 需求 + +修改 `sync_rtl/sha3/TB/tb_sha3_xsim_simple.v`，将其中硬编码的测试向量替换为指定的 d、k 值，测试 sha3_top 的 G (SHA3-512) 模式。 + +## 测试输入 + +``` +d = 0x6dbbc4375136df3b07f7c70e639e223e177e7fd53b161b3f4d57791794f12624 (256-bit) +k = 2 (8-bit) +mode = G (2'b00) +``` + +在 RTL 中，G 模式的输入格式为 `data_i[263:0] = {d[255:0], k[7:0]}`（d 在低位，k 在高位），即： + +``` +data_i = {248'd0, 8'd2, 256'h6dbbc4375136df3b07f7c70e639e223e177e7fd53b161b3f4d57791794f12624} +``` + +## 修改方案 + +修改 `tb_sha3_xsim_simple.v`： +1. 将 `data_i = 512'd0` 替换为指定值 `{248'd0, 8'd2, 256'h6dbbc4375136df3b07f7c70e639e223e177e7fd53b161b3f4d57791794f12624}` +2. 删除 `G_EXPECTED_HASH` 参数和自检比较逻辑，改为仅打印 `hash_o` 结果 +3. 更新顶部的注释说明 + +## 预期输出 + +运行后打印 `hash_o` 的值，可通过 Python 参考实现 `SHA_3.G(d, k)` 交叉验证。 diff --git a/.trellis/tasks/06-27-sha3-g-test-specific-input/task.json b/.trellis/tasks/06-27-sha3-g-test-specific-input/task.json new file mode 100644 index 0000000..ccd10c5 --- /dev/null +++ b/.trellis/tasks/06-27-sha3-g-test-specific-input/task.json @@ -0,0 +1,26 @@ +{ + "id": "sha3-g-test-specific-input", + "name": "sha3-g-test-specific-input", + "title": "修改sha3 TB测试G模式指定输入d=k=2", + "description": "", + "status": "in_progress", + "dev_type": null, + "scope": null, + "package": null, + "priority": "P2", + "creator": "FallenSigh", + "assignee": "FallenSigh", + "createdAt": "2026-06-27", + "completedAt": null, + "branch": null, + "base_branch": "main", + "worktree_path": null, + "commit": null, + "pr_url": null, + "subtasks": [], + "children": [], + "parent": null, + "relatedFiles": [], + "notes": "", + "meta": {} +} \ No newline at end of file diff --git a/test_framework/modules/comp_decomp/test_plan.json b/test_framework/modules/comp_decomp/test_plan.json index 479ecb9..c74f167 100644 --- a/test_framework/modules/comp_decomp/test_plan.json +++ b/test_framework/modules/comp_decomp/test_plan.json @@ -33,6 +33,34 @@ "params": {"mode": "decompress", "d": 4}, "num_vectors": 10, "tolerance": "bit_exact" + }, + { + "id": "compress_du11", + "description": "Compress with du=11 (ML-KEM-1024)", + "params": {"mode": "compress", "d": 11}, + "num_vectors": 20, + "tolerance": "bit_exact" + }, + { + "id": "compress_dv5", + "description": "Compress with dv=5 (ML-KEM-1024)", + "params": {"mode": "compress", "d": 5}, + "num_vectors": 20, + "tolerance": "bit_exact" + }, + { + "id": "decompress_du11", + "description": "Decompress with du=11 (ML-KEM-1024)", + "params": {"mode": "decompress", "d": 11}, + "num_vectors": 10, + "tolerance": "bit_exact" + }, + { + "id": "decompress_dv5", + "description": "Decompress with dv=5 (ML-KEM-1024)", + "params": {"mode": "decompress", "d": 5}, + "num_vectors": 10, + "tolerance": "bit_exact" } ] }