From 37c4df2582b34c1b60e3b86daf35dfdca4e2abbf Mon Sep 17 00:00:00 2001
From: FallenSigh <fallensigh@gmail.com>
Date: Thu, 25 Jun 2026 22:23:08 +0800
Subject: [PATCH] chore(task): archive 06-25-fix-tb-failures

---
 .../2026-06/06-25-fix-tb-failures/check.jsonl |  1 +
 .../06-25-fix-tb-failures/implement.jsonl     |  1 +
 .../2026-06/06-25-fix-tb-failures/prd.md      | 39 +++++++++++++++++++
 .../2026-06/06-25-fix-tb-failures/task.json   | 26 +++++++++++++
 4 files changed, 67 insertions(+)
 create mode 100644 .trellis/tasks/archive/2026-06/06-25-fix-tb-failures/check.jsonl
 create mode 100644 .trellis/tasks/archive/2026-06/06-25-fix-tb-failures/implement.jsonl
 create mode 100644 .trellis/tasks/archive/2026-06/06-25-fix-tb-failures/prd.md
 create mode 100644 .trellis/tasks/archive/2026-06/06-25-fix-tb-failures/task.json

diff --git a/.trellis/tasks/archive/2026-06/06-25-fix-tb-failures/check.jsonl b/.trellis/tasks/archive/2026-06/06-25-fix-tb-failures/check.jsonl
new file mode 100644
index 0000000..9d17183
--- /dev/null
+++ b/.trellis/tasks/archive/2026-06/06-25-fix-tb-failures/check.jsonl
@@ -0,0 +1 @@
+{"file": ".trellis/spec/rtl/xsim-tb-conventions.md", "reason": "XSIM TB quality checks — TCL format, timing, part-select constraints"}
diff --git a/.trellis/tasks/archive/2026-06/06-25-fix-tb-failures/implement.jsonl b/.trellis/tasks/archive/2026-06/06-25-fix-tb-failures/implement.jsonl
new file mode 100644
index 0000000..23013e3
--- /dev/null
+++ b/.trellis/tasks/archive/2026-06/06-25-fix-tb-failures/implement.jsonl
@@ -0,0 +1 @@
+{"file": ".trellis/spec/rtl/xsim-tb-conventions.md", "reason": "XSIM TB conventions — TCL format, part-select constraints, timing patterns"}
diff --git a/.trellis/tasks/archive/2026-06/06-25-fix-tb-failures/prd.md b/.trellis/tasks/archive/2026-06/06-25-fix-tb-failures/prd.md
new file mode 100644
index 0000000..faa4d3c
--- /dev/null
+++ b/.trellis/tasks/archive/2026-06/06-25-fix-tb-failures/prd.md
@@ -0,0 +1,39 @@
+# 修复 7 个失败的 testbench
+
+## Goal
+
+修复在 Vivado 2019.2 上运行失败的 7 个 testbench：comp_decomp, storage, sha3_chain, ntt, poly_mul, sample_cbd, sample_ntt。
+
+## Root Causes
+
+### 1. TCL 变量缺失 (sha3_chain, sample_cbd, sample_ntt)
+`run_tb.sh` 只提取 `set SRC_DIR/TB_DIR/COMMON_DIR`，但这些 TCL 还定义了 `SHA3_DIR` 等变量用于引用 sha3 依赖。
+
+### 2. Verilog part-select 非常量 (ntt, poly_mul)
+```verilog
+t_coeffs[ci] = vector_mem[idx][(255-ci)*12+11 : (255-ci)*12];
+```
+Vivado 2019.2 要求 part-select 的边界必须是常量表达式，`ci` 是变量导致编译失败。需要改用 `+:` 或 `for` 循环 + `case`。
+
+### 3. BRAM 读延迟未对齐 (storage)
+s_bram/sd_bram 有 1 周期读延迟：assert rd_addr 后，下一周期 rd_data 才有效。TB 在同一周期检查 rd_data。
+
+### 4. comp_decomp 位宽边界 (comp_decomp)
+d=12 时 compress 输出需要 12 位（2^12=4096），期望值 4095 正确但 DUT 的 `coeff_out` 只有 12 位。实际问题是 compress mod 2^d 在边界处产生 0（因为 4095+1 进位溢出）。需要检查 gen_vectors.py 的期望值生成逻辑。
+
+## Requirements
+
+* sha3_chain, sample_cbd, sample_ntt: 修复 xsim_run.tcl 中缺失的变量定义
+* ntt, poly_mul: 修复 part-select 为非变量形式
+* storage: 修复读延迟（插入 1 个时钟周期等待）
+* comp_decomp: 修复期望值或 TB 比较逻辑
+* 所有 10 个 TB 在 Vivado 2019.2 上 PASS
+
+## Decisions Made
+
+* 直接修复现有 TB 文件，不重新生成
+* 遵循 Vivado 2019.2 SystemVerilog 约束
+
+## Out of Scope
+
+* RTL 修改
diff --git a/.trellis/tasks/archive/2026-06/06-25-fix-tb-failures/task.json b/.trellis/tasks/archive/2026-06/06-25-fix-tb-failures/task.json
new file mode 100644
index 0000000..e3a1167
--- /dev/null
+++ b/.trellis/tasks/archive/2026-06/06-25-fix-tb-failures/task.json
@@ -0,0 +1,26 @@
+{
+  "id": "fix-tb-failures",
+  "name": "fix-tb-failures",
+  "title": "修复7个失败的testbench",
+  "description": "",
+  "status": "completed",
+  "dev_type": null,
+  "scope": null,
+  "package": null,
+  "priority": "P2",
+  "creator": "FallenSigh",
+  "assignee": "FallenSigh",
+  "createdAt": "2026-06-25",
+  "completedAt": "2026-06-25",
+  "branch": null,
+  "base_branch": "main",
+  "worktree_path": null,
+  "commit": null,
+  "pr_url": null,
+  "subtasks": [],
+  "children": [],
+  "parent": null,
+  "relatedFiles": [],
+  "notes": "",
+  "meta": {}
+}
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