feat(enc): Encaps E0 - op_i/msg_i/ek-load scaffold + H(ek)+G(m||H(ek))
Extend mlkem_top with a runtime op_i select (0=KeyGen, 1=Encaps) and the
first Encaps stages, reusing the shared keccak_core and the ST_H multi-block
SHA3-256 machinery:
ST_ENC_H: H(ek) over preloaded ek_bram (same FSM as KeyGen ST_H)
ST_ENC_G: (K,r) = G(m||H(ek)) via new 64-byte single-block SHA3-512
- sha3_top_shared: add mode=2'b11 = SHA3-512 over a full 512-bit message
(g512_pad). Standalone tb_sha3_g512 confirms it byte-exact.
- mlkem_top: new ports op_i, msg_i, ek_in_{we,addr,byte} (ek preload), ss_o,
dbg_ct_*, dbg_r_o/dbg_hek_o. st widened 4->5 bits; ST_ENC_* states added.
Renamed message port to msg_i to avoid collision with ST_M counter m_i.
- TB tb_mlkem_enc_katK + gen_encaps_vectors.py (per-byte ek/m/ct/ss vectors).
Verified ss==KAT.ss for K=2/3/4, cases 0-2 (all PASS). KeyGen unaffected
(K=2 c0 still ek==pk, dk==sk byte-exact).
This commit is contained in:
@@ -28,12 +28,25 @@ module mlkem_top #(
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input clk,
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input rst_n,
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input [2:0] k_i, // RUNTIME ML-KEM param: 2=512, 3=768, 4=1024
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input op_i, // 0 = KeyGen, 1 = Encaps (captured at start_i)
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input [255:0] d_i, // KeyGen seed d (byte 0 in d_i[7:0])
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input [255:0] z_i, // implicit-rejection seed z
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input [255:0] msg_i, // Encaps message m (byte 0 in msg_i[7:0])
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input start_i, // pulse to begin KeyGen
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output busy_o, // high while running
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output done_o, // pulse when ek/dk ready
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// Encaps ek input: stream ek bytes (=pk) into ek_bram before start_i with
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// op_i=1. ek_in_we writes byte ek_in_byte at address ek_in_addr.
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input ek_in_we, // write one ek byte (only honored in ST_IDLE for Encaps preload)
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input [10:0] ek_in_addr, // ek byte address 0..ek_bytes-1
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input [7:0] ek_in_byte, // ek byte value
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// Encaps shared secret output (= K), valid at done_o
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output [255:0] ss_o,
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// Encaps ciphertext readback tap: ct byte by index 0..ct_bytes-1
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input [10:0] dbg_ct_idx_i,
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output [7:0] dbg_ct_o,
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// Debug readback tap: read one stored coefficient by (poly slot, index).
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// Lets stage TBs verify intermediates without wide buses.
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input [3:0] dbg_slot_i, // poly slot (see localparams below)
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@@ -49,7 +62,10 @@ module mlkem_top #(
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output [7:0] dbg_dk_o,
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// Debug taps for hash outputs
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output [255:0] dbg_rho_o,
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output [255:0] dbg_sigma_o
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output [255:0] dbg_sigma_o,
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// Encaps debug taps: r (G high half) and H(ek)
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output [255:0] dbg_r_o,
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output [255:0] dbg_hek_o
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);
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localparam Q = `Q; // 3329
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@@ -70,6 +86,27 @@ module mlkem_top #(
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wire [3:0] h_nblk_rt = (k_r == 3'd2) ? 4'd6 : (k_r == 3'd3) ? 4'd9 : 4'd12;
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wire [11:0] h_last_rt = {6'b0, h_nblk_rt} * 12'd136 - 12'd1; // final padded byte index
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// ---- Encaps runtime params ----
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reg op_r; // 0=KeyGen 1=Encaps (captured at start)
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reg [255:0] m_r; // Encaps message m (captured at start)
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reg [255:0] ss_r; // Encaps shared secret K (= G output low half)
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reg [255:0] r_r; // Encaps PRF seed r (= G output high half)
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// FIPS 203: eta2 = 2 for all parameter sets.
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wire [1:0] eta2_rt = 2'd2;
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// Compression params: (du,dv) = (10,4) for k=2/3, (11,5) for k=4.
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wire [4:0] du_rt = (k_r == 3'd4) ? 5'd11 : 5'd10;
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wire [4:0] dv_rt = (k_r == 3'd4) ? 5'd5 : 5'd4;
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// Ciphertext byte sizes: c1 = 32*du*k, c2 = 32*dv, ct = c1+c2.
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wire [11:0] c1_bytes_rt = 12'd32 * {7'b0, du_rt} * {9'b0, k_r}; // 640/960/1408
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wire [11:0] c2_bytes_rt = 12'd32 * {7'b0, dv_rt}; // 128/128/160
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wire [11:0] ct_bytes_rt = c1_bytes_rt + c2_bytes_rt; // 768/1088/1568
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assign ss_o = ss_r;
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// ct readback tap (ct_bram added in E5/E7); tied off until then.
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/* verilator lint_off UNUSEDSIGNAL */
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wire [10:0] dbg_ct_idx_unused = dbg_ct_idx_i;
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/* verilator lint_on UNUSEDSIGNAL */
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assign dbg_ct_o = 8'd0;
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// ================================================================
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// Polynomial storage, sized for KMAX (worst case). Runtime k uses a
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// sub-range. Slot layout (each slot = 256 coeffs):
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@@ -203,10 +240,17 @@ module mlkem_top #(
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reg [10:0] ek_wa, dkp_wa;
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reg [7:0] ek_wd, dkp_wd;
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// ek BRAM write port: KeyGen ST_E drives ek_we/ek_wa/ek_wd; Encaps preloads
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// ek from the external ek_in_* port (TB streams ek=pk before start_i). The
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// two never overlap (preload happens in ST_IDLE before an Encaps run).
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wire ek_we_mux = ek_in_we ? 1'b1 : ek_we;
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wire [10:0] ek_wa_mux = ek_in_we ? ek_in_addr : ek_wa;
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wire [7:0] ek_wd_mux = ek_in_we ? ek_in_byte : ek_wd;
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sd_bram #(.W(8), .D(2048), .A(11)) u_ek_bram (
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.clk(clk),
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.rd_addr(ek_rd_addr), .rd_data(ek_rd_data),
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.wr_en(ek_we), .wr_addr(ek_wa), .wr_data(ek_wd)
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.wr_en(ek_we_mux), .wr_addr(ek_wa_mux), .wr_data(ek_wd_mux)
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);
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sd_bram #(.W(8), .D(2048), .A(11)) u_dkp_bram (
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.clk(clk),
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@@ -236,17 +280,29 @@ module mlkem_top #(
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// ================================================================
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// Top-level FSM (built incrementally). Stage 2a: G only.
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// ================================================================
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localparam ST_IDLE = 4'd0;
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localparam ST_G = 4'd1; // run G(d||K), capture rho/sigma
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localparam ST_A = 4'd2; // generate A_hat[i][j] via SampleNTT
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localparam ST_C = 4'd3; // generate s[i],e[i] via CBD
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localparam ST_N = 4'd4; // forward NTT of s[i],e[i] in place
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localparam ST_M = 4'd5; // matrix accumulate t_hat = e_hat + sum A o s_hat
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localparam ST_E = 4'd6; // byteEncode12 -> ek/dk BRAM
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localparam ST_H = 4'd7; // H(ek) via multi-block SHA3-256
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localparam ST_DONE = 4'd15;
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localparam ST_IDLE = 5'd0;
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localparam ST_G = 5'd1; // run G(d||K), capture rho/sigma
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localparam ST_A = 5'd2; // generate A_hat[i][j] via SampleNTT
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localparam ST_C = 5'd3; // generate s[i],e[i] via CBD
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localparam ST_N = 5'd4; // forward NTT of s[i],e[i] in place
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localparam ST_M = 5'd5; // matrix accumulate t_hat = e_hat + sum A o s_hat
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localparam ST_E = 5'd6; // byteEncode12 -> ek/dk BRAM
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localparam ST_H = 5'd7; // H(ek) via multi-block SHA3-256
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// ---- Encaps states ----
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localparam ST_ENC_LOAD = 5'd8; // ek already preloaded; placeholder/settle
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localparam ST_ENC_H = 5'd9; // H(ek) via multi-block SHA3-256 (reuses ST_H logic)
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localparam ST_ENC_G = 5'd10; // (K,r) = G(m || H(ek)), 64-byte single block
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localparam ST_ENC_A = 5'd11; // regenerate A_hat (transpose used in U)
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localparam ST_ENC_TDEC = 5'd12; // byteDecode12: ek -> t_hat (bank_t)
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localparam ST_ENC_C = 5'd13; // sample y,e1,e2 via CBD (eta1/eta2)
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localparam ST_ENC_N = 5'd14; // forward NTT of y in place
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localparam ST_ENC_U = 5'd15; // u = INTT(sum A^T o y_hat) + e1
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localparam ST_ENC_C1 = 5'd16; // Compress_du + byteEncode_du -> ct c1
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localparam ST_ENC_V = 5'd17; // v = INTT(sum t_hat o y_hat) + e2 + mu
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localparam ST_ENC_C2 = 5'd18; // Compress_dv + byteEncode_dv -> ct c2
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localparam ST_DONE = 5'd31;
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reg [3:0] st, st_next;
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reg [4:0] st, st_next;
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reg [255:0] rho_r, sigma_r;
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// A-generation bookkeeping: explicit i/j counters (avoid runtime divide)
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@@ -270,6 +326,8 @@ module mlkem_top #(
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assign done_o = (st == ST_DONE);
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assign dbg_rho_o = rho_r;
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assign dbg_sigma_o = sigma_r;
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assign dbg_r_o = r_r;
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assign dbg_hek_o = hek_r;
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// ---- sha3_top in G mode: data_i = {K_byte, d} (d byte0 in [7:0]) ----
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reg sha3_valid;
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@@ -277,7 +335,9 @@ module mlkem_top #(
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wire [511:0] sha3_hash;
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wire sha3_vo;
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reg sha3_ack; // consumer ready for hash
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wire [511:0] g_data = {248'b0, 5'b0, k_r, d_i}; // data_i[263:256]=k, [255:0]=d
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wire [511:0] kg_g_data = {248'b0, 5'b0, k_r, d_i}; // KeyGen G: [263:256]=k, [255:0]=d
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wire [511:0] enc_g_data = {hek_r, m_r}; // Encaps G: m || H(ek), 64 bytes
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wire [511:0] g_data = (st == ST_ENC_G) ? enc_g_data : kg_g_data;
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// ================================================================
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// Shared keccak_core + phase mux (3 consumers -> 1 core)
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@@ -301,10 +361,12 @@ module mlkem_top #(
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wire sha3_kc_ready_i, snt_kc_ready_i, cbd_kc_ready_i; // all 1'b1
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/* verilator lint_on UNUSEDSIGNAL */
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// phase selects (mutually exclusive)
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wire sel_sha3 = (st == ST_G) || (st == ST_H);
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wire sel_snt = (st == ST_A);
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wire sel_cbd = (st == ST_C);
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// phase selects (mutually exclusive). Encaps adds ST_ENC_H/G (sha3),
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// ST_ENC_A (snt), ST_ENC_C (cbd).
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wire sel_sha3 = (st == ST_G) || (st == ST_H) ||
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(st == ST_ENC_H) || (st == ST_ENC_G);
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wire sel_snt = (st == ST_A) || (st == ST_ENC_A);
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wire sel_cbd = (st == ST_C) || (st == ST_ENC_C);
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// gated output-valid: only the active consumer sees kc_valid_o
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wire kc_valid_o_sha3 = kc_valid_o & sel_sha3;
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@@ -334,10 +396,13 @@ module mlkem_top #(
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// multi-block absorb path (mb_en=1). These phases are disjoint in the
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// top FSM, so one sha3_top (one keccak_core) is sufficient. mb_en and
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// ready_i are muxed by phase; data_i/mode only matter while mb_en=0.
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wire sha3_mb_en = (st == ST_H);
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wire sha3_mb_en = (st == ST_H) || (st == ST_ENC_H);
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// sha3 single-block mode: 2'b00 = G(33B) for KeyGen, 2'b11 = G(64B) for
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// Encaps (m||H(ek)). mode only matters when mb_en=0.
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wire [1:0] sha3_mode = (st == ST_ENC_G) ? 2'b11 : 2'b00;
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sha3_top_shared u_sha3 (
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.clk(clk), .rst_n(rst_n),
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.mode(2'b00), // G = SHA3-512 (only used when mb_en=0)
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.mode(sha3_mode), // G = SHA3-512 (only used when mb_en=0)
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.data_i(g_data),
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.valid_i(sha3_valid),
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.ready_o(sha3_ready),
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@@ -408,7 +473,7 @@ module mlkem_top #(
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// dbg_dk ek-region takes priority (its loop runs after the ek loop), so the
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// single read port serves dbg_byte_o (ek loop) then dbg_dk_o (dk loop).
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wire [11:0] dbgdk_ek_off = dbg_dk_idx_i - dk_bytes_rt; // offset within ek region
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assign ek_rd_addr = (st == ST_H) ? h_g_addr[10:0] :
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assign ek_rd_addr = (st == ST_H || st == ST_ENC_H) ? h_g_addr[10:0] :
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dbgdk_in_ek ? dbgdk_ek_off[10:0]
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: dbg_byte_idx_i;
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// dkp BRAM read-address mux: dbg_byte (sel=1) or dbg_dk (dkp region).
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@@ -600,7 +665,7 @@ module mlkem_top #(
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always @(*) begin
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st_next = st;
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case (st)
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ST_IDLE: if (start_i) st_next = ST_G;
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ST_IDLE: if (start_i) st_next = op_i ? ST_ENC_H : ST_G;
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ST_G: if (sha3_vo) st_next = ST_A;
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ST_A: if (a_pair >= kk_rt) st_next = ST_C;
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ST_C: if (c_poly >= {1'b0, k_r, 1'b0}) st_next = ST_N;
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@@ -608,6 +673,9 @@ module mlkem_top #(
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ST_M: if (m_i >= k_r) st_next = ST_E;
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ST_E: if (e_done) st_next = ST_H;
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ST_H: if (h_phase == 2'd3) st_next = ST_DONE;
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// ---- Encaps ----
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ST_ENC_H: if (h_phase == 2'd3) st_next = ST_ENC_G;
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ST_ENC_G: if (sha3_vo) st_next = ST_DONE; // E0: stop here (K,r captured)
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ST_DONE: st_next = ST_IDLE;
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default: st_next = ST_IDLE;
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endcase
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@@ -617,6 +685,10 @@ module mlkem_top #(
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if (!rst_n) begin
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st <= ST_IDLE;
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k_r <= 3'd0;
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op_r <= 1'b0;
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m_r <= 256'd0;
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ss_r <= 256'd0;
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r_r <= 256'd0;
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rho_r <= 256'd0;
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sigma_r <= 256'd0;
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sha3_valid <= 1'b0;
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@@ -680,11 +752,25 @@ module mlkem_top #(
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ek_we <= 1'b0;
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dkp_we <= 1'b0;
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// Kick off G when entering ST_G
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// Kick off when entering from IDLE: KeyGen starts G; Encaps captures
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// op/m and arms the H(ek) machinery (ST_ENC_H reuses the ST_H FSM).
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if (st == ST_IDLE && start_i) begin
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k_r <= k_i; // capture runtime ML-KEM param
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sha3_valid <= 1'b1;
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sha3_ack <= 1'b1;
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k_r <= k_i; // capture runtime ML-KEM param
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op_r <= op_i;
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if (op_i) begin
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m_r <= msg_i; // capture Encaps message
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// arm H(ek) (same fields the ST_E->ST_H arming sets)
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h_blk <= 3'd0;
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h_byte <= 8'd0;
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h_phase <= 2'd0; // assemble
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h_mbvalid<= 1'b0;
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h_mblast <= 1'b0;
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h_ack <= 1'b1; // ready to consume final digest
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h_wb_vld <= 1'b0;
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end else begin
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sha3_valid <= 1'b1;
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sha3_ack <= 1'b1;
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end
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end
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// Drop valid once accepted
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if (sha3_valid && sha3_ready) sha3_valid <= 1'b0;
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@@ -954,8 +1040,10 @@ module mlkem_top #(
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h_wb_vld <= 1'b0; // no pending writeback yet
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end
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// ---- ST_H: H(ek) via multi-block SHA3-256 (6/9/12 pre-padded blocks) ----
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if (st == ST_H) begin
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// ---- ST_H / ST_ENC_H: H(ek) via multi-block SHA3-256 ----
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// Same logic for KeyGen (ek just written by ST_E) and Encaps (ek
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// preloaded into ek_bram by the TB). hek_r captures H(ek) either way.
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if (st == ST_H || st == ST_ENC_H) begin
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case (h_phase)
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// assemble 136 bytes of block h_blk into h_block_r.
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// ek BRAM read is registered: present addr for h_byte this
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@@ -1005,6 +1093,19 @@ module mlkem_top #(
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default: ; // 2'd3 done: hold
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endcase
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end
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// Arm Encaps G when H(ek) finishes: fire the 64-byte single-block
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// G(m||H(ek)). hek_r now holds H(ek); enc_g_data = {hek_r, m_r}.
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if (st == ST_ENC_H && st_next == ST_ENC_G) begin
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sha3_valid <= 1'b1;
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sha3_ack <= 1'b1;
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end
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// Capture (K, r) when Encaps G completes. ss = K = low half, r = high.
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if (st == ST_ENC_G && sha3_vo) begin
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ss_r <= sha3_hash[255:0]; // K (shared secret) = G bytes 0..31
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r_r <= sha3_hash[511:256]; // r = G bytes 32..63
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sha3_ack <= 1'b0;
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end
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end
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end
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Reference in New Issue
Block a user