From 030931d4e5d1491d6402fbbc385ee7008c1e129a Mon Sep 17 00:00:00 2001
From: FallenSigh <fallensigh@gmail.com>
Date: Mon, 29 Jun 2026 15:22:34 +0800
Subject: [PATCH] feat(dec): Decaps D0 - op_i widen + dk/c load + parse

Scaffolding for ML-KEM Decaps (FIPS 203 Alg 18):
- op_i widened to 2-bit: 00=KeyGen, 01=Encaps, 10=Decaps (op_r too).
- New ST_DEC_LOAD state (D0: settles to DONE so load/parse is dbg-checkable).
- dk (=sk) streamed via dk_in_*; load logic routes each byte by region:
  [0,384K)->dk_pke (dkp_bram), [384K,768K+32)->ek_pke (ek_bram),
  [768K+32,+32)->H(ek) (hek_r), [768K+64,+32)->z (z_r). Routing uses the
  LIVE k_i input, not start-captured k_r (dk is streamed before start_i).
- c (=ct) streamed via c_in_* into a SEPARATE c_in_bram, so the computed c'
  (ct_bram) can later be compared against original c and J(z||c) can read c.
- New dbg taps: dbg_mprime_o/dbg_kbar_o/dbg_decz_o/dbg_dech_o.

TB: tb_mlkem_dec_katK_xsim verifies dk parse (H(ek), z, ek_pke/dk_pke BRAM
round-trip). gen_decaps_vectors.py emits dec_k{K}_c{N}_{dk,ct,ss,ctn,ssn}.hex
from the NIST KAT. run_tb.sh gains a 'dec' module (mirrors 'enc').

Regression fix: old KeyGen/Encaps TBs didn't connect the new input ports,
floating them to X and corrupting the ek/dkp write muxes -> tied off
dk_in_*/c_in_*/new dbg taps in both.

Verified: dec D0 K=2/3/4 PASS; KeyGen K=2 + Encaps K=2 unregressed.
---
 .claude/plans/decaps_plan.md              |   89 +
 run_tb.sh                                 |   64 +-
 sync_rtl/top/TB/gen_decaps_vectors.py     |   80 +
 sync_rtl/top/TB/tb_mlkem_dec_katK_xsim.v  |  153 +
 sync_rtl/top/TB/tb_mlkem_enc_katK_xsim.v  |    7 +-
 sync_rtl/top/TB/tb_mlkem_kg_katK_xsim.v   |    7 +-
 sync_rtl/top/TB/vectors/dec_k2_c0_ct.hex  |  768 +++++
 sync_rtl/top/TB/vectors/dec_k2_c0_ctn.hex |  768 +++++
 sync_rtl/top/TB/vectors/dec_k2_c0_dk.hex  | 1632 +++++++++++
 sync_rtl/top/TB/vectors/dec_k2_c0_ss.hex  |   32 +
 sync_rtl/top/TB/vectors/dec_k2_c0_ssn.hex |   32 +
 sync_rtl/top/TB/vectors/dec_k2_c1_ct.hex  |  768 +++++
 sync_rtl/top/TB/vectors/dec_k2_c1_ctn.hex |  768 +++++
 sync_rtl/top/TB/vectors/dec_k2_c1_dk.hex  | 1632 +++++++++++
 sync_rtl/top/TB/vectors/dec_k2_c1_ss.hex  |   32 +
 sync_rtl/top/TB/vectors/dec_k2_c1_ssn.hex |   32 +
 sync_rtl/top/TB/vectors/dec_k2_c2_ct.hex  |  768 +++++
 sync_rtl/top/TB/vectors/dec_k2_c2_ctn.hex |  768 +++++
 sync_rtl/top/TB/vectors/dec_k2_c2_dk.hex  | 1632 +++++++++++
 sync_rtl/top/TB/vectors/dec_k2_c2_ss.hex  |   32 +
 sync_rtl/top/TB/vectors/dec_k2_c2_ssn.hex |   32 +
 sync_rtl/top/TB/vectors/dec_k3_c0_ct.hex  | 1088 +++++++
 sync_rtl/top/TB/vectors/dec_k3_c0_ctn.hex | 1088 +++++++
 sync_rtl/top/TB/vectors/dec_k3_c0_dk.hex  | 2400 ++++++++++++++++
 sync_rtl/top/TB/vectors/dec_k3_c0_ss.hex  |   32 +
 sync_rtl/top/TB/vectors/dec_k3_c0_ssn.hex |   32 +
 sync_rtl/top/TB/vectors/dec_k3_c1_ct.hex  | 1088 +++++++
 sync_rtl/top/TB/vectors/dec_k3_c1_ctn.hex | 1088 +++++++
 sync_rtl/top/TB/vectors/dec_k3_c1_dk.hex  | 2400 ++++++++++++++++
 sync_rtl/top/TB/vectors/dec_k3_c1_ss.hex  |   32 +
 sync_rtl/top/TB/vectors/dec_k3_c1_ssn.hex |   32 +
 sync_rtl/top/TB/vectors/dec_k3_c2_ct.hex  | 1088 +++++++
 sync_rtl/top/TB/vectors/dec_k3_c2_ctn.hex | 1088 +++++++
 sync_rtl/top/TB/vectors/dec_k3_c2_dk.hex  | 2400 ++++++++++++++++
 sync_rtl/top/TB/vectors/dec_k3_c2_ss.hex  |   32 +
 sync_rtl/top/TB/vectors/dec_k3_c2_ssn.hex |   32 +
 sync_rtl/top/TB/vectors/dec_k4_c0_ct.hex  | 1568 ++++++++++
 sync_rtl/top/TB/vectors/dec_k4_c0_ctn.hex | 1568 ++++++++++
 sync_rtl/top/TB/vectors/dec_k4_c0_dk.hex  | 3168 +++++++++++++++++++++
 sync_rtl/top/TB/vectors/dec_k4_c0_ss.hex  |   32 +
 sync_rtl/top/TB/vectors/dec_k4_c0_ssn.hex |   32 +
 sync_rtl/top/TB/vectors/dec_k4_c1_ct.hex  | 1568 ++++++++++
 sync_rtl/top/TB/vectors/dec_k4_c1_ctn.hex | 1568 ++++++++++
 sync_rtl/top/TB/vectors/dec_k4_c1_dk.hex  | 3168 +++++++++++++++++++++
 sync_rtl/top/TB/vectors/dec_k4_c1_ss.hex  |   32 +
 sync_rtl/top/TB/vectors/dec_k4_c1_ssn.hex |   32 +
 sync_rtl/top/TB/vectors/dec_k4_c2_ct.hex  | 1568 ++++++++++
 sync_rtl/top/TB/vectors/dec_k4_c2_ctn.hex | 1568 ++++++++++
 sync_rtl/top/TB/vectors/dec_k4_c2_dk.hex  | 3168 +++++++++++++++++++++
 sync_rtl/top/TB/vectors/dec_k4_c2_ss.hex  |   32 +
 sync_rtl/top/TB/vectors/dec_k4_c2_ssn.hex |   32 +
 sync_rtl/top/mlkem_top.v                  |  127 +-
 52 files changed, 43220 insertions(+), 27 deletions(-)
 create mode 100644 .claude/plans/decaps_plan.md
 create mode 100644 sync_rtl/top/TB/gen_decaps_vectors.py
 create mode 100644 sync_rtl/top/TB/tb_mlkem_dec_katK_xsim.v
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c0_ct.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c0_ctn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c0_dk.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c0_ss.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c0_ssn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c1_ct.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c1_ctn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c1_dk.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c1_ss.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c1_ssn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c2_ct.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c2_ctn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c2_dk.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c2_ss.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k2_c2_ssn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c0_ct.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c0_ctn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c0_dk.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c0_ss.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c0_ssn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c1_ct.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c1_ctn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c1_dk.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c1_ss.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c1_ssn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c2_ct.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c2_ctn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c2_dk.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c2_ss.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k3_c2_ssn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c0_ct.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c0_ctn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c0_dk.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c0_ss.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c0_ssn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c1_ct.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c1_ctn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c1_dk.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c1_ss.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c1_ssn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c2_ct.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c2_ctn.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c2_dk.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c2_ss.hex
 create mode 100644 sync_rtl/top/TB/vectors/dec_k4_c2_ssn.hex

diff --git a/.claude/plans/decaps_plan.md b/.claude/plans/decaps_plan.md
new file mode 100644
index 0000000..15c821a
--- /dev/null
+++ b/.claude/plans/decaps_plan.md
@@ -0,0 +1,89 @@
+# ML-KEM Decaps 顶层集成 — 实现计划
+
+> 在 `mlkem_top`(KeyGen + Encaps 均 KAT 通过)基础上扩展 Decaps(FIPS 203 Alg 18 + K-PKE.Decrypt Alg 15)。
+> 决策(已与用户确认):**(1) 实现完整隐式拒绝路径(J + 常量时间 c'==c 比较 + K̄/K' mux),并用 corrupted-ct(KAT ct_n/ss_n)验证拒绝路径;(2) 逐级 dbg tap 对拍 ml-kem-r golden(m'/w/u_hat 等)+ 端到端 ss==KAT.ss。**
+
+## 算法(Decaps_internal,全 K)
+输入:dk(=KAT.sk,768K+96 B)、c(=KAT.ct,32(du·K+dv) B)。输出:K'=ss(32 B)。
+1. 解析 dk:`dk_pke = dk[0:384K]`(s_hat)、`ek_pke = dk[384K:768K+32]`、`h = dk[768K+32:768K+64]`、`z = dk[768K+64:768K+96]`。
+2. `m' = K-PKE.Decrypt(dk_pke, c)`(**唯一全新数据通路**,见下)。
+3. `(K', r') = G(m' ‖ h)` = SHA3-512(64 B 单块)。**与 Encaps G 完全相同**(mode=11)。
+4. `K̄ = J(z ‖ c)` = SHAKE-256(z‖c, 32 B 输出)。**多块,块数 6/9/12 = 与 H(ek) 相同**。
+5. `c' = K-PKE.Encrypt(ek_pke, m', r')`。**这就是 Encaps E1–E7**(A 再生 + 采样 y/e1/e2(seed=r') + NTT + u + v + 压缩成 ct')。**已 KAT 通过,零改动复用**。
+6. 常量时间比较 `c' == c`(逐字节 XOR 累加)。
+7. `K' = (c'==c) ? K' : K̄`(隐式拒绝 mux)。返回 K'=ss。
+
+### K-PKE.Decrypt(Alg 15,全新)
+- 解析 c:`c1 = c[0:32·du·K]`、`c2 = c[32·du·K : +32·dv]`。
+- `u'[i] = Decompress_du(byteDecode_du(c1[i]))`,i=0..K-1(**新:通用 byteDecode_d 解包器 + comp_decomp mode=1 解压**)。
+- `v' = Decompress_dv(byteDecode_dv(c2))`(1 poly)。
+- `s_hat[i] = byteDecode12(dk_pke[i·384..])`,i=0..K-1(**复用 Encaps TDEC 机器**,5-cyc/triple)。
+- `u_hat[i] = NTT(u'[i])`(mode=0,K polys,**复用 ST_ENC_N 的 ntt_core**)。
+- `w = v' − INTT(Σⱼ s_hat[j]∘u_hat[j])` mod Q(**复用 Encaps V 机器(MAC+INTT),ADD 改 SUB,加数 v' 替 e2+mu**)。
+- `m' = byteEncode₁(Compress₁(w))` = 32 B(**复用 C1/C2 打包器,d=1**)。
+
+## 复用与新增
+
+### 直接复用(零或极小改动)
+- **整个 Encaps E1–E7**(c' = Encrypt):A 再生、CBD(seed=r')、NTT、U、V、C1、C2 → ct_bram。完全复用,只是 seed 来自 r'(已是 r_r 路径)、ek 来自 ek_pke(已在 ek_bram)、m 来自 m'(新:m' 寄存器替 m_r)。
+- `u_sha3` G(mode=11,m'‖h):与 Encaps G 同,只是 enc_g_data 高半改 h(来自 dk 而非 H(ek) 重算)。
+- `u_keccak` 共享核 + J 多块:复用 H 的 mb 路径,仅末块 pad 常量 0x06→0x1F(SHAKE)。
+- `ntt_core`:u_hat fwd NTT(mode=0,复用 ST_ENC_N);decrypt 的 INTT(mode=1,复用 V 的 u_intt 路径)。
+- `poly_mul` / 3 银行 / comp_decomp:加 Decaps phase mux。
+- Encaps TDEC(byteDecode12 → bank_a):decrypt 的 s_hat 解码复用(改落 dk_pke 源 + 目标 bank)。
+
+### 新增 RTL
+- **`byteDecode_d` 通用解包器**(d∈{4,5,10,11}):c 字节流 → d-bit 系数,LSB-first(byteEncode_d 的逆)。新写,流式读 ct/c_bram,写银行。
+- **comp_decomp mode=1 解压**:实例已有(E5/E7 用 mode=0);Decaps decode-decompress 用 mode=1,d=du/dv。加 phase。
+- **dk 载入路径**:`dk_in_*`(或复用 ek_in_* 加宽地址),Decaps 前流入 dk_bram。顶层解析:dk_pke→bank/解码、ek_pke→ek_bram、h/z→寄存器。
+- **c 载入路径**:`c_in_*` 流入 ct_bram 的「输入 c」区(注意 c' 也写 ct_bram → 需独立 c_in_bram 或分区,见存储编排)。
+- **J 多块组装**:z(reg)‖c(c_in_bram)→ 136B 块,末块 0x1F pad。新地址逻辑(类 H 的 h_g_addr)。
+- **w = v' − INTT(...)**:V 机器 ADD 子相改 SUB(`(v' − psum) mod Q`,负则 +Q),加数源 v'(银行)替 e2(bank_a)+mu。
+- **m' Compress₁+byteEncode₁**:打包器加 d=1 路径(每系数 1 bit,256 bit = 32 B)。m' 落 32-bit 寄存器(供 G 与 c'-Encrypt)。
+- **常量时间比较 c'==c**:逐字节读 ct_bram(c')与 c_in_bram(c),XOR 累加进 1-bit `ct_ne_r`(全程扫完,不早退)。
+- **隐式拒绝 mux**:`ss_r = ct_ne_r ? k_bar_r : kprime_r`。
+- **op_i 加宽 2-bit**:00=KeyGen,01=Encaps,10=Decaps。新增 ST_DEC_* 状态。
+
+## 存储编排(关键)
+- **c 输入 vs c' 输出冲突**:Decaps 既要保留输入 c(给 J 和最终比较),又要算 c'(写 ct_bram)。**解法:c 输入存独立 `c_in_bram`(sd_bram W=8 D=2048);c' 仍写 ct_bram。** 比较阶段两个 bram 各一读口,无冲突。J 从 c_in_bram 读。
+- **Decrypt 阶段银行**:s_hat(K)、u'(K)、u_hat(=NTT(u') 就地 K)、v'(1)、psum/w(1)。
+  - u' → bank_se rel 0..K-1;NTT 就地得 u_hat。
+  - s_hat → bank_a slot j·K(复用 TDEC 落点 + V-MAC 寻址)。
+  - v' → bank_t rel 0(或 bank_a 空 slot)。
+  - psum(Σ s∘u_hat)→ bank_t[UPSUM];INTT 就地;SUB 读 v'(bank_t rel 0)+ psum(bank_t UPSUM)→ 单口冲突 → v' 改存 bank_a 某 slot(类 e2 搬迁)或 bank_se 空区。**bring-up 定稿,dbg 验证。**
+  - m' 算完 → 32-bit 寄存器。Decrypt 阶段结束,银行清空。
+- **Encrypt(c')阶段**:Decrypt 已出 m'(reg),银行重新被 Encaps E1–E7 占用,无并发。
+
+## 顶层接口新增
+- `op_i [1:0]`:00/01/10。start_i 锁存 op_r[1:0]。
+- `dk_in_*`(we/addr/byte):dk 流入。`c_in_*`(we/addr/byte):c 流入。
+- `ss_o`(复用):Decaps 输出 K'。
+- dbg taps:m'(`dbg_mprime_o[255:0]`)、w/u_hat 经现有 dbg_coeff_o、k_bar(`dbg_kbar_o`)。
+
+## 实现阶段(逐阶段 dbg/KAT 对拍)
+- **D0 — 脚手架 + dk/c 载入 + 解析** ✅:op_i 加宽 2-bit(00 KG/01 Enc/10 Dec),ST_DEC_LOAD(D0 暂直接→DONE)。dk 流入按 region 路由:dk_pke→dkp_bram、ek_pke→ek_bram、h→hek_r、z→z_r;ct→c_in_bram(独立于 ct_bram)。dbg 验证 h/z/ek_pke/dk_pke。**踩坑1:载入路由用 k_r 但 k_r 在 start_i 才锁存 → 预载期 region 边界全 0,路由全错。改用 LIVE k_i 边界(dkp_bytes_ld 等)。踩坑2:旧 KG/Enc TB 未接新端口(dk_in_*/c_in_*/dbg_*)→ X 漂入 write mux,KeyGen/Encaps 超时回归。补 tie-off 0。** runner = `./run_tb.sh dec [K] [CASE]`。K=2/3/4 D0 全过,KG/Enc 回归通过。
+- **D1 — byteDecode_d + Decompress → u'/v'**:新解包器 + comp_decomp mode=1。dbg 对 u'/v'(ml-kem-r golden,新 dump_decaps)。
+- **D2 — s_hat 解码 + u_hat = NTT(u')**:TDEC 复用(dk_pke 源)、ntt_core fwd。dbg 对 s_hat / u_hat。
+- **D3 — w = v' − INTT(Σ s∘u_hat)**:V 机器 SUB 变体。dbg 对 w。
+- **D4 — m' = byteEncode₁(Compress₁(w))**:打包器 d=1。dbg 对 m'(== KAT 解密的 m')。
+- **D5 — G(m'‖h) → (K',r') + J(z‖c) → K̄**:G 复用、J 多块(0x1F pad)。dbg 对 K'/r'/K̄。
+- **D6 — c' = Encrypt(ek_pke,m',r')**:复用 Encaps E1–E7 写 ct_bram。dbg 对 c'==KAT.ct(有效 ct 时)。
+- **D7 — 比较 + 拒绝 mux + 端到端 KAT**:c'==c 常量时间比较,ss=mux。干净 TB:
+  - 有效 ct(KAT.ct):ss==KAT.ss(c'==c → K')。
+  - 损坏 ct(KAT ct_n / ss_n):ss==KAT.ss_n(c'≠c → K̄)。
+  - K=2/3/4 各 count=0..N。
+
+## 验证
+- 新 `dump_decaps.rs`(ml-kem-r examples,工作树):出 D1–D6 中间量(u'/v'/s_hat/u_hat/w/m'/K'/K̄)256-coeff / 32B golden。
+- 新 TB `tb_mlkem_dec_katK_xsim.v`:从 KAT 取 sk(→dk)、ct、ss、ct_n、ss_n,载入 dk/c,跑 Decaps,比 ss。
+- runner:`./run_tb.sh dec [K] [CASE]`(并入 run_tb,复用 top tcl + dec TB)。
+- XSIM 环境同前:`source settings64.sh; export LD_PRELOAD=libtinfo.so.5; rm -rf xsim.dir .Xil`。
+
+## 风险 / 注意
+- **c 输入 / c' 输出共存**:必须分两个 bram(c_in_bram + ct_bram),否则 c' 覆盖 c 后无法比较 / 算 J。最易错,D0 定。
+- **w 的 SUB**:`(v' − psum) mod Q`,结果可能负 → +Q 修正(类 mod_sub)。v'/psum 读口冲突 → v' 搬到不同 bank。D3 dbg 验证。
+- **J SHAKE pad**:末块 0x1F(非 0x06);单字节差异,复用 H mb 机器加 phase 选择 pad 常量。
+- **op_i 加宽**:1-bit→2-bit,改 IDLE 分发、reset、所有 op_r 判断。回归 KeyGen/Encaps 不破。
+- **m' 双用**:既喂 G(m'‖h)又喂 c'-Encrypt(替 m_r)。确保 Encrypt 路径读 m'_r 而非 m_r(加 mux 或 Decaps 时把 m'_r 写入 m_r)。
+- **隐式拒绝常量时间**:比较全程扫完不早退(XOR 累加),硬件天然如此;但 mux 不可短路。
+- **ek_pke 来自 dk**:Decaps 的 Encrypt 用 dk 内嵌的 ek_pke(解析到 ek_bram),不是外部 ek。
diff --git a/run_tb.sh b/run_tb.sh
index bda2aca..057c002 100755
--- a/run_tb.sh
+++ b/run_tb.sh
@@ -10,12 +10,15 @@
 #        ./run_tb.sh enc                  # ML-KEM Encaps: all K, all cases (0..2)
 #        ./run_tb.sh enc 2                # Encaps K=2, all its cases
 #        ./run_tb.sh enc 4 1              # Encaps K=4, only CASE=1
+#        ./run_tb.sh dec                  # ML-KEM Decaps: all K, all cases (0..2)
+#        ./run_tb.sh dec 2 0              # Decaps K=2, only CASE=0
 #        ./run_tb.sh --list
 #
-# 'top' (KeyGen) and 'enc' (Encaps) share the same RTL datapath; both compile
-# the xvlog lines from sync_rtl/top/TB/xsim_run.tcl. They differ only in the
-# testbench: top -> tb_mlkem_kg_katK_xsim, enc -> tb_mlkem_enc_katK_xsim.
-# For these two, K (2/3/4) and CASE select a single KAT run so you can iterate
+# 'top' (KeyGen), 'enc' (Encaps) and 'dec' (Decaps) share the same RTL datapath;
+# all compile the xvlog lines from sync_rtl/top/TB/xsim_run.tcl. They differ only
+# in the testbench: top -> tb_mlkem_kg_katK_xsim, enc -> tb_mlkem_enc_katK_xsim,
+# dec -> tb_mlkem_dec_katK_xsim.
+# For these, K (2/3/4) and CASE select a single KAT run so you can iterate
 # quickly. Other modules ignore the extra args and run their xsim_run.tcl verbatim.
 #
 # Prerequisites:
@@ -35,6 +38,7 @@ if [ "$1" = "--list" ]; then
         fi
     done
     echo "  enc   (ML-KEM Encaps; shares the 'top' RTL/tcl, enc testbench)"
+    echo "  dec   (ML-KEM Decaps; shares the 'top' RTL/tcl, dec testbench)"
     exit 0
 fi
 
@@ -48,8 +52,8 @@ MODULE="$1"
 SEL_K="$2"          # optional: 2/3/4 (top/enc modules only)
 SEL_CASE="$3"       # optional: KAT case index (top/enc modules only)
 # 'enc' is not its own RTL dir; it reuses the 'top' KeyGen tcl compile list
-# (same datapath) and swaps in the encaps testbench.
-if [ "$MODULE" = "enc" ]; then
+# (same datapath) and swaps in the encaps testbench. 'dec' likewise (Decaps).
+if [ "$MODULE" = "enc" ] || [ "$MODULE" = "dec" ]; then
     TB_DIR="$SCRIPT_DIR/sync_rtl/top/TB"
 else
     TB_DIR="$SCRIPT_DIR/sync_rtl/$MODULE/TB"
@@ -188,11 +192,59 @@ run_enc_selected() {
     return $fail
 }
 
+# ML-KEM Decaps runner. Same compile basis as enc (top tcl minus KeyGen TB) plus
+# the decaps TB. Result line matches the final-stage PASS tag (D0..D7).
+run_dec_selected() {
+    local tcl_file="$1" ksel="$2" csel="$3"
+    set +e
+
+    rm -rf xsim.dir .Xil
+
+    while read -r cmd; do
+        [[ "$cmd" == *tb_mlkem_kg_katK* ]] && continue
+        eval "$cmd" || { echo "COMPILE FAILED: $cmd"; return 1; }
+    done < <(grep -E '^xvlog ' "$tcl_file")
+
+    echo "  xvlog -sv --relax sync_rtl/top/TB/tb_mlkem_dec_katK_xsim.v"
+    xvlog -sv --relax sync_rtl/top/TB/tb_mlkem_dec_katK_xsim.v \
+        || { echo "DEC TB COMPILE FAILED"; return 1; }
+
+    local ks; if [ -n "$ksel" ]; then ks="$ksel"; else ks="2 3 4"; fi
+    local fail=0
+    for k in $ks; do
+        echo "  xelab tb_mlkem_dec_katK_xsim -generic_top KP=$k -s mlkem_dec_k$k --timescale 1ns/1ps"
+        xelab tb_mlkem_dec_katK_xsim -generic_top KP=$k -s mlkem_dec_k$k --timescale 1ns/1ps \
+            || { echo "ELAB FAILED for K=$k"; fail=1; continue; }
+
+        local cases="0 1 2"
+        if [ -n "$csel" ]; then cases="$csel"; fi
+        for c in $cases; do
+            local log="/tmp/run_tb_dec_k${k}_c${c}.log"
+            echo "  xsim mlkem_dec_k$k -R -testplusarg CASE=$c"
+            echo "========================================" | tee "$log"
+            xsim "mlkem_dec_k$k" -R -testplusarg "CASE=$c" 2>&1 | tee -a "$log"
+            echo "========================================" | tee -a "$log"
+            local pf nf
+            # match the highest-stage result line: 'K=.. CASE .. PASS (Dn): ...'
+            pf=$(grep -oE 'PASS \(D[0-7]\)|FAIL \(D[0-7]\)' "$log" | tail -1)
+            nf=$(grep -c 'cannot be opened' "$log")
+            echo "    K=$k CASE=$c -> ${pf:-NORESULT}  (file-not-found=$nf, log: $log)"
+            { [[ "$pf" == PASS* ]] && [ "$nf" -eq 0 ]; } || fail=1
+        done
+    done
+    return $fail
+}
+
 if [ "$MODULE" = "enc" ]; then
     run_enc_selected "$TCL_FILE" "$SEL_K" "$SEL_CASE"
     exit $?
 fi
 
+if [ "$MODULE" = "dec" ]; then
+    run_dec_selected "$TCL_FILE" "$SEL_K" "$SEL_CASE"
+    exit $?
+fi
+
 if [ "$MODULE" = "top" ] && [ -n "$SEL_K" ]; then
     run_top_selected "$TCL_FILE" "$SEL_K" "$SEL_CASE"
     exit $?
diff --git a/sync_rtl/top/TB/gen_decaps_vectors.py b/sync_rtl/top/TB/gen_decaps_vectors.py
new file mode 100644
index 0000000..c3d7a74
--- /dev/null
+++ b/sync_rtl/top/TB/gen_decaps_vectors.py
@@ -0,0 +1,80 @@
+#!/usr/bin/env python3
+"""gen_decaps_vectors.py - Emit per-byte Decaps KAT vectors for the XSIM TB.
+
+For ML-KEM-512/768/1024, parse the NIST .rsp and write, per case:
+  dec_k{K}_c{N}_dk.hex  : dk (=sk) bytes, one hex byte per line, byte 0 first
+  dec_k{K}_c{N}_ct.hex  : ct bytes (valid ciphertext), one per line, byte 0 first
+  dec_k{K}_c{N}_ss.hex  : ss bytes (shared secret for valid ct), byte 0 first
+  dec_k{K}_c{N}_ctn.hex : ct_n bytes (corrupted ct -> implicit reject)
+  dec_k{K}_c{N}_ssn.hex : ss_n bytes (shared secret K-bar for the reject path)
+
+The TB streams dk into the design via dk_in_* (routed to dk_pke/ek_pke/h/z by
+region) and ct into c_in_*, runs Decaps, and checks ss:
+  valid ct  -> ss == ss   (c'==c, K' kept)
+  ct_n      -> ss == ss_n (c'!=c, K-bar via J(z||c_n))
+
+Run: python3 gen_decaps_vectors.py [num_cases]
+"""
+
+import os
+import re
+import sys
+
+ML_KEM_R = os.environ.get("ML_KEM_R", os.path.expanduser("~/Dev/ml-kem-r"))
+OUT_DIR = os.path.join(os.path.dirname(__file__), "vectors")
+KATS = {2: "kat_MLKEM_512.rsp", 3: "kat_MLKEM_768.rsp", 4: "kat_MLKEM_1024.rsp"}
+
+
+def parse_kat(path, n):
+    """Return list of dicts {count, sk, ct, ss, ct_n, ss_n} (hex) for first n."""
+    vecs, cur = [], {}
+    with open(path) as f:
+        for line in f:
+            line = line.strip()
+            m = re.match(r"^count\s*=\s*(\d+)$", line)
+            if m:
+                if cur:
+                    vecs.append(cur)
+                if len(vecs) >= n:
+                    break
+                cur = {"count": int(m.group(1))}
+                continue
+            # exact-key match: 'ct =' vs 'ct_n =', 'ss =' vs 'ss_n ='
+            m = re.match(r"^(sk|ct|ss|ct_n|ss_n)\s*=\s*([0-9a-fA-F]+)$", line)
+            if m and cur:
+                cur[m.group(1)] = m.group(2).lower()
+    if cur and len(vecs) < n:
+        vecs.append(cur)
+    return vecs
+
+
+def write_bytes(path, hexstr):
+    """Write hex string as one byte per line (byte 0 = first 2 hex chars)."""
+    with open(path, "w") as f:
+        for i in range(0, len(hexstr), 2):
+            f.write(hexstr[i:i + 2] + "\n")
+
+
+def main():
+    ncases = int(sys.argv[1]) if len(sys.argv) > 1 else 3
+    os.makedirs(OUT_DIR, exist_ok=True)
+    for k, fname in KATS.items():
+        path = os.path.join(ML_KEM_R, "test_data", fname)
+        if not os.path.exists(path):
+            print(f"skip K={k}: {path} not found", file=sys.stderr)
+            continue
+        vecs = parse_kat(path, ncases)
+        for v in vecs:
+            n = v["count"]
+            base = os.path.join(OUT_DIR, f"dec_k{k}_c{n}")
+            write_bytes(f"{base}_dk.hex", v["sk"])
+            write_bytes(f"{base}_ct.hex", v["ct"])
+            write_bytes(f"{base}_ss.hex", v["ss"])
+            write_bytes(f"{base}_ctn.hex", v["ct_n"])
+            write_bytes(f"{base}_ssn.hex", v["ss_n"])
+        print(f"K={k}: wrote {len(vecs)} cases "
+              f"(dk={len(vecs[0]['sk'])//2}B ct={len(vecs[0]['ct'])//2}B)")
+
+
+if __name__ == "__main__":
+    main()
diff --git a/sync_rtl/top/TB/tb_mlkem_dec_katK_xsim.v b/sync_rtl/top/TB/tb_mlkem_dec_katK_xsim.v
new file mode 100644
index 0000000..71cad33
--- /dev/null
+++ b/sync_rtl/top/TB/tb_mlkem_dec_katK_xsim.v
@@ -0,0 +1,153 @@
+// tb_mlkem_dec_katK_xsim.v - ML-KEM Decaps vs NIST KAT, parametric K (KP) + CASE.
+// D0 stage: stream dk (=sk) into the design via dk_in_* (routed to
+// dk_pke/ek_pke/h/z by region) and ct via c_in_*, pulse start with op=2, and
+// verify the dk PARSE: H(ek) (dbg_dech_o), z (dbg_decz_o), and round-trip a few
+// ek_pke bytes (dbg_byte sel=0) and dk_pke bytes (sel=1) back out of BRAM.
+//
+// xelab -generic_top KP=2|3|4 ; xsim -testplusarg CASE=n
+//   dk/ct/ss vectors: sync_rtl/top/TB/vectors/dec_k{K}_c{N}_{dk,ct,ss,ctn,ssn}.hex
+`timescale 1ns/1ps
+module tb_mlkem_dec_katK_xsim;
+    parameter KP = 2;
+    localparam DKB = 768*KP + 96;                  // dk (=sk) bytes: 1632/2400/3168
+    localparam EKB = 384*KP + 32;                  // ek_pke bytes within dk
+    localparam DKPB = 384*KP;                      // dk_pke bytes
+    localparam CTB = (KP==4) ? 1568 : (32*(10*KP+4)); // ct bytes: 768/1088/1568
+
+    reg clk=0, rst_n=0, start_i=0;
+    reg [2:0]   k_i;
+    reg [255:0] d_i=0, z_i=0, m_i=0;
+    wire busy_o, done_o;
+    // ek preload port (unused in Decaps; ek_pke comes from dk)
+    reg         ek_in_we=0; reg [10:0] ek_in_addr=0; reg [7:0] ek_in_byte=0;
+    // dk / c input ports
+    reg         dk_in_we=0; reg [11:0] dk_in_addr=0; reg [7:0] dk_in_byte=0;
+    reg         c_in_we=0;  reg [10:0] c_in_addr=0;  reg [7:0] c_in_byte=0;
+    wire [255:0] ss_o;
+    reg  [10:0] dbg_ct_idx_i=0; wire [7:0] dbg_ct_o;
+    reg [3:0] dbg_slot_i=0; reg [7:0] dbg_idx_i=0; wire [11:0] dbg_coeff_o;
+    reg dbg_byte_sel_i=0; reg [10:0] dbg_byte_idx_i=0; wire [7:0] dbg_byte_o;
+    reg [11:0] dbg_dk_idx_i=0; wire [7:0] dbg_dk_o;
+    wire [255:0] dbg_rho_o, dbg_sigma_o, dbg_r_o, dbg_hek_o;
+    wire [255:0] dbg_mprime_o, dbg_kbar_o, dbg_decz_o, dbg_dech_o;
+
+    mlkem_top dut (
+        .clk(clk), .rst_n(rst_n), .k_i(k_i), .op_i(2'd2),
+        .d_i(d_i), .z_i(z_i), .msg_i(m_i), .start_i(start_i),
+        .busy_o(busy_o), .done_o(done_o),
+        .ek_in_we(ek_in_we), .ek_in_addr(ek_in_addr), .ek_in_byte(ek_in_byte),
+        .dk_in_we(dk_in_we), .dk_in_addr(dk_in_addr), .dk_in_byte(dk_in_byte),
+        .c_in_we(c_in_we), .c_in_addr(c_in_addr), .c_in_byte(c_in_byte),
+        .ss_o(ss_o), .dbg_ct_idx_i(dbg_ct_idx_i), .dbg_ct_o(dbg_ct_o),
+        .dbg_slot_i(dbg_slot_i), .dbg_idx_i(dbg_idx_i), .dbg_coeff_o(dbg_coeff_o),
+        .dbg_byte_sel_i(dbg_byte_sel_i), .dbg_byte_idx_i(dbg_byte_idx_i), .dbg_byte_o(dbg_byte_o),
+        .dbg_dk_idx_i(dbg_dk_idx_i), .dbg_dk_o(dbg_dk_o),
+        .dbg_rho_o(dbg_rho_o), .dbg_sigma_o(dbg_sigma_o),
+        .dbg_r_o(dbg_r_o), .dbg_hek_o(dbg_hek_o),
+        .dbg_mprime_o(dbg_mprime_o), .dbg_kbar_o(dbg_kbar_o),
+        .dbg_decz_o(dbg_decz_o), .dbg_dech_o(dbg_dech_o)
+    );
+    always #5 clk = ~clk;
+
+    reg [7:0] dk_b [0:DKB-1];
+    reg [7:0] ct_b [0:CTB-1];
+    reg [7:0] ss_b [0:31];
+    integer c, i, j, errors, casenum;
+    reg [8*80-1:0] tag, dkfile, ctfile, ssfile;
+
+    initial begin
+        if (!$value$plusargs("CASE=%d", casenum)) casenum = 0;
+        $sformat(tag, "k%0d", KP);
+        $sformat(dkfile, "sync_rtl/top/TB/vectors/dec_%0s_c%0d_dk.hex", tag, casenum);
+        $sformat(ctfile, "sync_rtl/top/TB/vectors/dec_%0s_c%0d_ct.hex", tag, casenum);
+        $sformat(ssfile, "sync_rtl/top/TB/vectors/dec_%0s_c%0d_ss.hex", tag, casenum);
+        $readmemh(dkfile, dk_b);
+        $readmemh(ctfile, ct_b);
+        $readmemh(ssfile, ss_b);
+        k_i = KP[2:0];
+
+        $display("=== ML-KEM K=%0d Decaps KAT case %0d (D0: load+parse) ===", KP, casenum);
+
+        rst_n=0; repeat(4) @(posedge clk); rst_n=1; @(posedge clk);
+
+        // ---- stream dk into the design (1 byte/cycle) ----
+        for (i = 0; i < DKB; i = i + 1) begin
+            dk_in_we = 1'b1; dk_in_addr = i[11:0]; dk_in_byte = dk_b[i];
+            @(posedge clk);
+        end
+        dk_in_we = 1'b0;
+
+        // ---- stream ct into c_in_bram (1 byte/cycle) ----
+        for (i = 0; i < CTB; i = i + 1) begin
+            c_in_we = 1'b1; c_in_addr = i[10:0]; c_in_byte = ct_b[i];
+            @(posedge clk);
+        end
+        c_in_we = 1'b0; @(posedge clk);
+
+        // ---- run Decaps ----
+        start_i=1; @(posedge clk); start_i=0;
+        c=0; while(!done_o && c<2000000) begin @(posedge clk); c=c+1; end
+        if(!done_o) begin $display("FAIL K=%0d case %0d: timeout", KP, casenum); $finish; end
+        $display("=== Decaps D0 done in %0d cyc ===", c);
+
+        verify_d0;
+        $finish;
+    end
+
+    initial begin #120000000; $display("FAIL: global timeout"); $finish; end
+
+    // D0: verify dk parse. H(ek)=dk[768K+32:+32], z=dk[768K+64:+32] captured into
+    // hek_r/z_r (dbg_dech_o/dbg_decz_o). ek_pke=dk[384K:768K+32] in ek_bram
+    // (dbg_byte sel=0), dk_pke=dk[0:384K] in dkp_bram (sel=1).
+    task verify_d0;
+        integer be;
+        reg [7:0] got;
+        begin
+            errors = 0;
+            // H(ek)
+            for (j = 0; j < 32; j = j + 1)
+                if (dbg_dech_o[8*j +: 8] !== dk_b[DKPB + EKB + j]) errors = errors + 1;
+            if (errors == 0) $display("  PASS: H(ek) parsed == dk[768K+32 ..]");
+            else             $display("  FAIL: H(ek) %0d byte mismatches", errors);
+
+            // z
+            be = 0;
+            for (j = 0; j < 32; j = j + 1)
+                if (dbg_decz_o[8*j +: 8] !== dk_b[DKPB + EKB + 32 + j]) be = be + 1;
+            if (be == 0) $display("  PASS: z parsed == dk[768K+64 ..]");
+            else         $display("  FAIL: z %0d byte mismatches", be);
+            errors = errors + be;
+
+            // ek_pke round-trip (every 97th byte to keep it quick)
+            be = 0;
+            for (i = 0; i < EKB; i = i + 97) begin
+                dbg_byte_sel_i = 1'b0; dbg_byte_idx_i = i[10:0];
+                @(posedge clk); @(posedge clk);
+                if (dbg_byte_o !== dk_b[DKPB + i]) begin
+                    if (be < 6) $display("  ekpke[%0d] got=%02x exp=%02x", i, dbg_byte_o, dk_b[DKPB+i]);
+                    be = be + 1;
+                end
+            end
+            if (be == 0) $display("  PASS: ek_pke round-trip (BRAM) == dk[384K ..]");
+            else         $display("  FAIL: ek_pke %0d byte mismatches", be);
+            errors = errors + be;
+
+            // dk_pke round-trip
+            be = 0;
+            for (i = 0; i < DKPB; i = i + 97) begin
+                dbg_byte_sel_i = 1'b1; dbg_byte_idx_i = i[10:0];
+                @(posedge clk); @(posedge clk);
+                if (dbg_byte_o !== dk_b[i]) begin
+                    if (be < 6) $display("  dkpke[%0d] got=%02x exp=%02x", i, dbg_byte_o, dk_b[i]);
+                    be = be + 1;
+                end
+            end
+            if (be == 0) $display("  PASS: dk_pke round-trip (BRAM) == dk[0 ..]");
+            else         $display("  FAIL: dk_pke %0d byte mismatches", be);
+            errors = errors + be;
+
+            if (errors == 0) $display("K=%0d CASE %0d PASS (D0): dk parse OK", KP, casenum);
+            else             $display("K=%0d CASE %0d FAIL (D0): %0d total errors", KP, casenum, errors);
+        end
+    endtask
+endmodule
diff --git a/sync_rtl/top/TB/tb_mlkem_enc_katK_xsim.v b/sync_rtl/top/TB/tb_mlkem_enc_katK_xsim.v
index 6622966..5c9e5ce 100644
--- a/sync_rtl/top/TB/tb_mlkem_enc_katK_xsim.v
+++ b/sync_rtl/top/TB/tb_mlkem_enc_katK_xsim.v
@@ -27,16 +27,19 @@ module tb_mlkem_enc_katK_xsim;
     wire [255:0] dbg_rho_o, dbg_sigma_o, dbg_r_o, dbg_hek_o;
 
     mlkem_top dut (
-        .clk(clk), .rst_n(rst_n), .k_i(k_i), .op_i(1'b1),
+        .clk(clk), .rst_n(rst_n), .k_i(k_i), .op_i(2'd1),
         .d_i(d_i), .z_i(z_i), .msg_i(m_i), .start_i(start_i),
         .busy_o(busy_o), .done_o(done_o),
         .ek_in_we(ek_in_we), .ek_in_addr(ek_in_addr), .ek_in_byte(ek_in_byte),
+        .dk_in_we(1'b0), .dk_in_addr(12'd0), .dk_in_byte(8'd0),
+        .c_in_we(1'b0), .c_in_addr(11'd0), .c_in_byte(8'd0),
         .ss_o(ss_o), .dbg_ct_idx_i(dbg_ct_idx_i), .dbg_ct_o(dbg_ct_o),
         .dbg_slot_i(dbg_slot_i), .dbg_idx_i(dbg_idx_i), .dbg_coeff_o(dbg_coeff_o),
         .dbg_byte_sel_i(dbg_byte_sel_i), .dbg_byte_idx_i(dbg_byte_idx_i), .dbg_byte_o(dbg_byte_o),
         .dbg_dk_idx_i(dbg_dk_idx_i), .dbg_dk_o(dbg_dk_o),
         .dbg_rho_o(dbg_rho_o), .dbg_sigma_o(dbg_sigma_o),
-        .dbg_r_o(dbg_r_o), .dbg_hek_o(dbg_hek_o)
+        .dbg_r_o(dbg_r_o), .dbg_hek_o(dbg_hek_o),
+        .dbg_mprime_o(), .dbg_kbar_o(), .dbg_decz_o(), .dbg_dech_o()
     );
     always #5 clk = ~clk;
 
diff --git a/sync_rtl/top/TB/tb_mlkem_kg_katK_xsim.v b/sync_rtl/top/TB/tb_mlkem_kg_katK_xsim.v
index a0562ea..cf0ac64 100644
--- a/sync_rtl/top/TB/tb_mlkem_kg_katK_xsim.v
+++ b/sync_rtl/top/TB/tb_mlkem_kg_katK_xsim.v
@@ -19,16 +19,19 @@ module tb_mlkem_kg_katK_xsim;
 
     // KMAX defaults to 4 (worst-case sizing); KP selects the runtime k value.
     mlkem_top dut (
-        .clk(clk), .rst_n(rst_n), .k_i(k_i), .op_i(1'b0),
+        .clk(clk), .rst_n(rst_n), .k_i(k_i), .op_i(2'd0),
         .d_i(d_i), .z_i(z_i), .msg_i(256'd0), .start_i(start_i),
         .busy_o(busy_o), .done_o(done_o),
         .ek_in_we(1'b0), .ek_in_addr(11'd0), .ek_in_byte(8'd0),
+        .dk_in_we(1'b0), .dk_in_addr(12'd0), .dk_in_byte(8'd0),
+        .c_in_we(1'b0), .c_in_addr(11'd0), .c_in_byte(8'd0),
         .ss_o(), .dbg_ct_idx_i(11'd0), .dbg_ct_o(),
         .dbg_slot_i(dbg_slot_i), .dbg_idx_i(dbg_idx_i), .dbg_coeff_o(dbg_coeff_o),
         .dbg_byte_sel_i(dbg_byte_sel_i), .dbg_byte_idx_i(dbg_byte_idx_i), .dbg_byte_o(dbg_byte_o),
         .dbg_dk_idx_i(dbg_dk_idx_i), .dbg_dk_o(dbg_dk_o),
         .dbg_rho_o(dbg_rho_o), .dbg_sigma_o(dbg_sigma_o),
-        .dbg_r_o(), .dbg_hek_o()
+        .dbg_r_o(), .dbg_hek_o(),
+        .dbg_mprime_o(), .dbg_kbar_o(), .dbg_decz_o(), .dbg_dech_o()
     );
     always #5 clk = ~clk;
 
diff --git a/sync_rtl/top/TB/vectors/dec_k2_c0_ct.hex b/sync_rtl/top/TB/vectors/dec_k2_c0_ct.hex
new file mode 100644
index 0000000..0059d6c
--- /dev/null
+++ b/sync_rtl/top/TB/vectors/dec_k2_c0_ct.hex
@@ -0,0 +1,768 @@
+91
+7e
+59
+d1
+e1
+82
+a2
+96
+48
+a6
+19
+55
+a1
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diff --git a/sync_rtl/top/TB/vectors/dec_k2_c0_ctn.hex b/sync_rtl/top/TB/vectors/dec_k2_c0_ctn.hex
new file mode 100644
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--- /dev/null
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diff --git a/sync_rtl/top/TB/vectors/dec_k2_c0_dk.hex b/sync_rtl/top/TB/vectors/dec_k2_c0_dk.hex
new file mode 100644
index 0000000..0c16c2c
--- /dev/null
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diff --git a/sync_rtl/top/TB/vectors/dec_k2_c0_ssn.hex b/sync_rtl/top/TB/vectors/dec_k2_c0_ssn.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k2_c1_ct.hex b/sync_rtl/top/TB/vectors/dec_k2_c1_ct.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k2_c1_ctn.hex b/sync_rtl/top/TB/vectors/dec_k2_c1_ctn.hex
new file mode 100644
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diff --git a/sync_rtl/top/TB/vectors/dec_k2_c1_dk.hex b/sync_rtl/top/TB/vectors/dec_k2_c1_dk.hex
new file mode 100644
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--- /dev/null
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diff --git a/sync_rtl/top/TB/vectors/dec_k2_c1_ssn.hex b/sync_rtl/top/TB/vectors/dec_k2_c1_ssn.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k2_c2_ct.hex b/sync_rtl/top/TB/vectors/dec_k2_c2_ct.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k2_c2_ctn.hex b/sync_rtl/top/TB/vectors/dec_k2_c2_ctn.hex
new file mode 100644
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--- /dev/null
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diff --git a/sync_rtl/top/TB/vectors/dec_k2_c2_dk.hex b/sync_rtl/top/TB/vectors/dec_k2_c2_dk.hex
new file mode 100644
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--- /dev/null
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diff --git a/sync_rtl/top/TB/vectors/dec_k2_c2_ssn.hex b/sync_rtl/top/TB/vectors/dec_k2_c2_ssn.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k3_c0_ct.hex b/sync_rtl/top/TB/vectors/dec_k3_c0_ct.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k3_c1_dk.hex b/sync_rtl/top/TB/vectors/dec_k3_c1_dk.hex
new file mode 100644
index 0000000..f190007
--- /dev/null
+++ b/sync_rtl/top/TB/vectors/dec_k3_c1_dk.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k3_c1_ssn.hex b/sync_rtl/top/TB/vectors/dec_k3_c1_ssn.hex
new file mode 100644
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diff --git a/sync_rtl/top/TB/vectors/dec_k3_c2_ct.hex b/sync_rtl/top/TB/vectors/dec_k3_c2_ct.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k3_c2_ctn.hex b/sync_rtl/top/TB/vectors/dec_k3_c2_ctn.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k4_c0_ct.hex b/sync_rtl/top/TB/vectors/dec_k4_c0_ct.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k4_c0_ctn.hex b/sync_rtl/top/TB/vectors/dec_k4_c0_ctn.hex
new file mode 100644
index 0000000..4e88ef7
--- /dev/null
+++ b/sync_rtl/top/TB/vectors/dec_k4_c0_ctn.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k4_c0_dk.hex b/sync_rtl/top/TB/vectors/dec_k4_c0_dk.hex
new file mode 100644
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--- /dev/null
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diff --git a/sync_rtl/top/TB/vectors/dec_k4_c0_ssn.hex b/sync_rtl/top/TB/vectors/dec_k4_c0_ssn.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k4_c1_ct.hex b/sync_rtl/top/TB/vectors/dec_k4_c1_ct.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k4_c1_ctn.hex b/sync_rtl/top/TB/vectors/dec_k4_c1_ctn.hex
new file mode 100644
index 0000000..1194a9f
--- /dev/null
+++ b/sync_rtl/top/TB/vectors/dec_k4_c1_ctn.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k4_c1_dk.hex b/sync_rtl/top/TB/vectors/dec_k4_c1_dk.hex
new file mode 100644
index 0000000..a88e4ba
--- /dev/null
+++ b/sync_rtl/top/TB/vectors/dec_k4_c1_dk.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k4_c1_ssn.hex b/sync_rtl/top/TB/vectors/dec_k4_c1_ssn.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k4_c2_ct.hex b/sync_rtl/top/TB/vectors/dec_k4_c2_ct.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k4_c2_ctn.hex b/sync_rtl/top/TB/vectors/dec_k4_c2_ctn.hex
new file mode 100644
index 0000000..8990f38
--- /dev/null
+++ b/sync_rtl/top/TB/vectors/dec_k4_c2_ctn.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k4_c2_dk.hex b/sync_rtl/top/TB/vectors/dec_k4_c2_dk.hex
new file mode 100644
index 0000000..126dd6c
--- /dev/null
+++ b/sync_rtl/top/TB/vectors/dec_k4_c2_dk.hex
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diff --git a/sync_rtl/top/TB/vectors/dec_k4_c2_ss.hex b/sync_rtl/top/TB/vectors/dec_k4_c2_ss.hex
new file mode 100644
index 0000000..5f0c4f8
--- /dev/null
+++ b/sync_rtl/top/TB/vectors/dec_k4_c2_ss.hex
@@ -0,0 +1,32 @@
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diff --git a/sync_rtl/top/TB/vectors/dec_k4_c2_ssn.hex b/sync_rtl/top/TB/vectors/dec_k4_c2_ssn.hex
new file mode 100644
index 0000000..bba0a39
--- /dev/null
+++ b/sync_rtl/top/TB/vectors/dec_k4_c2_ssn.hex
@@ -0,0 +1,32 @@
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diff --git a/sync_rtl/top/mlkem_top.v b/sync_rtl/top/mlkem_top.v
index 8aeecfc..85b600f 100644
--- a/sync_rtl/top/mlkem_top.v
+++ b/sync_rtl/top/mlkem_top.v
@@ -28,7 +28,7 @@ module mlkem_top #(
     input              clk,
     input              rst_n,
     input  [2:0]       k_i,          // RUNTIME ML-KEM param: 2=512, 3=768, 4=1024
-    input              op_i,          // 0 = KeyGen, 1 = Encaps (captured at start_i)
+    input  [1:0]       op_i,          // 0=KeyGen, 1=Encaps, 2=Decaps (captured at start_i)
     input  [255:0]     d_i,          // KeyGen seed d (byte 0 in d_i[7:0])
     input  [255:0]     z_i,          // implicit-rejection seed z
     input  [255:0]     msg_i,        // Encaps message m (byte 0 in msg_i[7:0])
@@ -41,6 +41,21 @@ module mlkem_top #(
     input              ek_in_we,     // write one ek byte (only honored in ST_IDLE for Encaps preload)
     input  [10:0]      ek_in_addr,   // ek byte address 0..ek_bytes-1
     input  [7:0]       ek_in_byte,   // ek byte value
+    // Decaps dk input: stream dk bytes (=sk, 768K+96) into the design before
+    // start_i with op_i=2. The load logic routes each byte by region:
+    //   [0,384K)            -> dk_pke (dkp_bram)   = s_hat encoding
+    //   [384K, 768K+32)     -> ek_pke (ek_bram)    = t_hat encoding || rho
+    //   [768K+32, 768K+64)  -> H(ek)  (hek_r)
+    //   [768K+64, 768K+96)  -> z      (z_r)
+    input              dk_in_we,     // write one dk byte (ST_IDLE Decaps preload)
+    input  [11:0]      dk_in_addr,   // dk byte address 0..(768K+96)-1
+    input  [7:0]       dk_in_byte,   // dk byte value
+    // Decaps ciphertext input: stream c bytes (=ct) into c_in_bram before
+    // start_i. Kept separate from ct_bram so the computed c' can be compared
+    // against the original c (and J(z||c) can read c) without aliasing.
+    input              c_in_we,      // write one c byte (ST_IDLE Decaps preload)
+    input  [10:0]      c_in_addr,    // c byte address 0..ct_bytes-1
+    input  [7:0]       c_in_byte,    // c byte value
     // Encaps shared secret output (= K), valid at done_o
     output [255:0]     ss_o,
     // Encaps ciphertext readback tap: ct byte by index 0..ct_bytes-1
@@ -65,7 +80,12 @@ module mlkem_top #(
     output [255:0]     dbg_sigma_o,
     // Encaps debug taps: r (G high half) and H(ek)
     output [255:0]     dbg_r_o,
-    output [255:0]     dbg_hek_o
+    output [255:0]     dbg_hek_o,
+    // Decaps debug taps: m' (Decrypt output), K-bar (J output), parsed z/h.
+    output [255:0]     dbg_mprime_o,
+    output [255:0]     dbg_kbar_o,
+    output [255:0]     dbg_decz_o,   // parsed z (dk[768K+64:+32])
+    output [255:0]     dbg_dech_o    // parsed H(ek) (dk[768K+32:+32])
 );
 
     localparam Q = `Q;   // 3329
@@ -82,15 +102,28 @@ module mlkem_top #(
     wire [5:0] slot_t_rt = kk_rt + {1'b0, k_r} + {1'b0, k_r};  // t_hat base = kk+2k
     wire [11:0] ek_bytes_rt = 12'd384 * {9'b0, k_r} + 12'd32;  // 800/1184/1568
     wire [11:0] dk_bytes_rt = 12'd384 * {9'b0, k_r};            // 768/1152/1536
+    // full dk = dk_pke(dk_bytes) || ek(ek_bytes) || H(ek)(32) || z(32). Region
+    // boundaries (used by Decaps dk load routing and dk readback).
+    wire [11:0] dk_ek_end   = dk_bytes_rt + ek_bytes_rt;        // ek_pke region end
+    wire [11:0] dk_hek_end  = dk_ek_end + 12'd32;               // H(ek) region end
+    // LOAD-TIME boundaries: dk is streamed in BEFORE start_i, so k_r is not yet
+    // captured. Route the dk load by the LIVE k_i input instead of k_r.
+    wire [11:0] dkp_bytes_ld = 12'd384 * {9'b0, k_i};                 // 768/1152/1536
+    wire [11:0] ek_bytes_ld  = 12'd384 * {9'b0, k_i} + 12'd32;        // 800/1184/1568
+    wire [11:0] dk_ek_end_ld = dkp_bytes_ld + ek_bytes_ld;           // ek_pke region end
+    wire [11:0] dk_hek_end_ld= dk_ek_end_ld + 12'd32;                // H(ek) region end
     // H(ek) block count = ceil((ek_bytes+1)/136): 6/9/12 for k=2/3/4 (table)
     wire [3:0] h_nblk_rt = (k_r == 3'd2) ? 4'd6 : (k_r == 3'd3) ? 4'd9 : 4'd12;
     wire [11:0] h_last_rt = {6'b0, h_nblk_rt} * 12'd136 - 12'd1;  // final padded byte index
 
     // ---- Encaps runtime params ----
-    reg          op_r;             // 0=KeyGen 1=Encaps (captured at start)
-    reg  [255:0] m_r;              // Encaps message m (captured at start)
+    reg  [1:0]   op_r;             // 0=KeyGen 1=Encaps 2=Decaps (captured at start)
+    reg  [255:0] m_r;              // Encaps message m (captured at start); Decaps reuses for m'
     reg  [255:0] ss_r;             // Encaps shared secret K (= G output low half)
     reg  [255:0] r_r;              // Encaps PRF seed r (= G output high half)
+    // ---- Decaps runtime params (parsed from dk during load) ----
+    reg  [255:0] z_r;              // implicit-rejection seed z (dk tail), captured at load
+    reg  [255:0] kbar_r;           // K-bar = J(z||c) (D5)
     // FIPS 203: eta2 = 2 for all parameter sets.
     wire [1:0]  eta2_rt = 2'd2;
     // Compression params: (du,dv) = (10,4) for k=2/3, (11,5) for k=4.
@@ -100,6 +133,7 @@ module mlkem_top #(
     wire [11:0] c1_bytes_rt = 12'd32 * {7'b0, du_rt} * {9'b0, k_r};  // 640/960/1408
     wire [11:0] c2_bytes_rt = 12'd32 * {7'b0, dv_rt};                 // 128/128/160
     wire [11:0] ct_bytes_rt = c1_bytes_rt + c2_bytes_rt;             // 768/1088/1568
+    wire [11:0] ct_bytes_rt = c1_bytes_rt + c2_bytes_rt;             // 768/1088/1568
     assign ss_o = ss_r;
 
     // ---- E1: rho-load + byteDecode12 bookkeeping ----
@@ -145,6 +179,23 @@ module mlkem_top #(
     assign ct_rd_addr = dbg_ct_idx_i;
     assign dbg_ct_o   = ct_rd_data;
 
+    // ---- c_in_bram: Decaps input ciphertext c (<=1568 B). Preloaded via
+    // c_in_* in ST_IDLE. Kept separate from ct_bram (which holds the computed
+    // c') so D7 can compare c' vs c and D5 J(z||c) can read c. Read port is
+    // muxed (D5 J-feed / D7 compare); for D0 only the load write path exists.
+    wire [10:0] cin_rd_addr;
+    wire [7:0]  cin_rd_data;
+    reg  [10:0] cin_rd_addr_r;       // D5/D7 read address (tied 0 until then)
+    sd_bram #(.W(8), .D(2048), .A(11)) u_c_in_bram (
+        .clk(clk),
+        .rd_addr(cin_rd_addr), .rd_data(cin_rd_data),
+        .wr_en(c_in_we), .wr_addr(c_in_addr), .wr_data(c_in_byte)
+    );
+    assign cin_rd_addr = cin_rd_addr_r;
+    /* verilator lint_off UNUSEDSIGNAL */
+    wire [7:0] cin_rd_data_unused = cin_rd_data;   // consumed in D5/D7
+    /* verilator lint_on UNUSEDSIGNAL */
+
     // ================================================================
     // Polynomial storage, sized for KMAX (worst case). Runtime k uses a
     // sub-range. Slot layout (each slot = 256 coeffs):
@@ -330,26 +381,39 @@ module mlkem_top #(
     reg  [7:0]  ek_wd, dkp_wd;
 
     // ek BRAM write port: KeyGen ST_E drives ek_we/ek_wa/ek_wd; Encaps preloads
-    // ek from the external ek_in_* port (TB streams ek=pk before start_i). The
-    // two never overlap (preload happens in ST_IDLE before an Encaps run).
-    wire        ek_we_mux = ek_in_we ? 1'b1       : ek_we;
-    wire [10:0] ek_wa_mux = ek_in_we ? ek_in_addr : ek_wa;
-    wire [7:0]  ek_wd_mux = ek_in_we ? ek_in_byte : ek_wd;
+    // ek from the external ek_in_* port (TB streams ek=pk before start_i). Decaps
+    // routes the dk's ek_pke region (dk[384K:768K+32]) here at load time. The
+    // three never overlap (preloads happen in ST_IDLE before a run).
+    wire        dk_ld_ekpke = dk_in_we && (dk_in_addr >= dkp_bytes_ld)
+                                       && (dk_in_addr <  dk_ek_end_ld);  // ek_pke region
+    wire        dk_ld_dkpke = dk_in_we && (dk_in_addr <  dkp_bytes_ld);  // dk_pke region
+    wire [10:0] dk_ek_off   = (dk_in_addr - dkp_bytes_ld);               // offset within ek
+    wire        ek_we_mux = ek_in_we   ? 1'b1       :
+                            dk_ld_ekpke ? 1'b1       : ek_we;
+    wire [10:0] ek_wa_mux = ek_in_we   ? ek_in_addr :
+                            dk_ld_ekpke ? dk_ek_off  : ek_wa;
+    wire [7:0]  ek_wd_mux = ek_in_we   ? ek_in_byte :
+                            dk_ld_ekpke ? dk_in_byte : ek_wd;
 
     sd_bram #(.W(8), .D(2048), .A(11)) u_ek_bram (
         .clk(clk),
         .rd_addr(ek_rd_addr), .rd_data(ek_rd_data),
         .wr_en(ek_we_mux), .wr_addr(ek_wa_mux), .wr_data(ek_wd_mux)
     );
+    // dk_pke BRAM write port: KeyGen ST_E (s_hat byteEncode) drives dkp_we/wa/wd;
+    // Decaps routes the dk's dk_pke region (dk[0:384K]) here at load time. The
+    // two never overlap (preload in ST_IDLE before a Decaps run).
+    wire        dkp_we_mux = dk_ld_dkpke ? 1'b1                 : dkp_we;
+    wire [10:0] dkp_wa_mux = dk_ld_dkpke ? dk_in_addr[10:0]     : dkp_wa;
+    wire [7:0]  dkp_wd_mux = dk_ld_dkpke ? dk_in_byte           : dkp_wd;
     sd_bram #(.W(8), .D(2048), .A(11)) u_dkp_bram (
         .clk(clk),
         .rd_addr(dkp_rd_addr), .rd_data(dkp_rd_data),
-        .wr_en(dkp_we), .wr_addr(dkp_wa), .wr_data(dkp_wd)
+        .wr_en(dkp_we_mux), .wr_addr(dkp_wa_mux), .wr_data(dkp_wd_mux)
     );
 
-    // full dk = dk_pke(dk_bytes) || ek(ek_bytes) || H(ek)(32) || z(32)
-    wire [11:0] dk_ek_end  = dk_bytes_rt + ek_bytes_rt;   // ek region end
-    wire [11:0] dk_hek_end = dk_ek_end + 12'd32;           // H(ek) region end
+    // full dk = dk_pke(dk_bytes) || ek(ek_bytes) || H(ek)(32) || z(32).
+    // (dk_ek_end / dk_hek_end declared near the top with the other size wires.)
 
     // Debug-region selects for dk readback (combinational region decode).
     wire dbgdk_in_dkp = (dbg_dk_idx_i < dk_bytes_rt);
@@ -390,6 +454,8 @@ module mlkem_top #(
     localparam ST_ENC_V    = 5'd17; // v = INTT(sum t_hat o y_hat) + e2 + mu
     localparam ST_ENC_C2   = 5'd18; // Compress_dv + byteEncode_dv -> ct c2
     localparam ST_ENC_E2MV = 5'd19; // relocate e2 bank_t[0] -> bank_a[E2_ASLOT]
+    // ---- Decaps states ----
+    localparam ST_DEC_LOAD = 5'd20; // dk/c already streamed in; parse/settle (D0)
     localparam ST_DONE   = 5'd31;
 
     reg [4:0]   st, st_next;
@@ -418,6 +484,11 @@ module mlkem_top #(
     assign dbg_sigma_o = sigma_r;
     assign dbg_r_o     = r_r;
     assign dbg_hek_o   = hek_r;
+    // Decaps taps: m' reuses m_r (Decrypt writes it), z/h parsed from dk at load.
+    assign dbg_mprime_o = m_r;
+    assign dbg_kbar_o   = kbar_r;
+    assign dbg_decz_o   = z_r;
+    assign dbg_dech_o   = hek_r;   // Decaps parses dk's H(ek) into hek_r at load
 
     // ---- sha3_top in G mode: data_i = {K_byte, d} (d byte0 in [7:0]) ----
     reg          sha3_valid;
@@ -897,7 +968,11 @@ module mlkem_top #(
     always @(*) begin
         st_next = st;
         case (st)
-            ST_IDLE: if (start_i) st_next = op_i ? ST_ENC_H : ST_G;
+            ST_IDLE: if (start_i) st_next = (op_i == 2'd2) ? ST_DEC_LOAD :
+                                            (op_i == 2'd1) ? ST_ENC_H    : ST_G;
+            // D0: settle after dk/c parse, then (D1+) proceed to Decrypt. For now
+            // ST_DEC_LOAD just lands in DONE so the load/parse can be dbg-checked.
+            ST_DEC_LOAD: st_next = ST_DONE;
             ST_G:    if (sha3_vo) st_next = ST_A;
             ST_A:    if (a_pair >= kk_rt) st_next = ST_C;
             ST_C:    if (c_poly >= {1'b0, k_r, 1'b0}) st_next = ST_N;
@@ -927,7 +1002,7 @@ module mlkem_top #(
         if (!rst_n) begin
             st         <= ST_IDLE;
             k_r        <= 3'd0;
-            op_r       <= 1'b0;
+            op_r       <= 2'd0;
             m_r        <= 256'd0;
             ss_r       <= 256'd0;
             r_r        <= 256'd0;
@@ -1024,6 +1099,9 @@ module mlkem_top #(
             h_mblast   <= 1'b0;
             h_ack      <= 1'b0;
             hek_r      <= 256'd0;
+            z_r        <= 256'd0;
+            kbar_r     <= 256'd0;
+            cin_rd_addr_r <= 11'd0;
             h_blk      <= 3'd0;
             h_byte     <= 8'd0;
             h_phase    <= 2'd0;
@@ -1043,11 +1121,12 @@ module mlkem_top #(
             em_we  <= 1'b0;    // e2-relocate bank_a write default low (E6)
 
             // Kick off when entering from IDLE: KeyGen starts G; Encaps captures
-            // op/m and arms the H(ek) machinery (ST_ENC_H reuses the ST_H FSM).
+            // op/m and arms the H(ek) machinery (ST_ENC_H reuses the ST_H FSM);
+            // Decaps captures op (dk/c already streamed; z/h captured at load).
             if (st == ST_IDLE && start_i) begin
                 k_r  <= k_i;                // capture runtime ML-KEM param
                 op_r <= op_i;
-                if (op_i) begin
+                if (op_i == 2'd1) begin
                     m_r      <= msg_i;      // capture Encaps message
                     // arm H(ek) (same fields the ST_E->ST_H arming sets)
                     h_blk    <= 3'd0;
@@ -1057,11 +1136,25 @@ module mlkem_top #(
                     h_mblast <= 1'b0;
                     h_ack    <= 1'b1;       // ready to consume final digest
                     h_wb_vld <= 1'b0;
+                end else if (op_i == 2'd2) begin
+                    // Decaps: dk_pke/ek_pke already in BRAM; z/H(ek) captured into
+                    // z_r/hek_r during load (below). Nothing else to arm in D0.
                 end else begin
                     sha3_valid <= 1'b1;
                     sha3_ack   <= 1'b1;
                 end
             end
+
+            // Decaps dk load: capture the H(ek) and z byte regions into registers
+            // as they stream in (the dk_pke/ek_pke regions go to BRAM via the
+            // write muxes). Byte i within a region lands in [8i +: 8]. Uses the
+            // LIVE k_i boundaries (k_r not yet captured during preload).
+            if (dk_in_we) begin
+                if (dk_in_addr >= dk_ek_end_ld && dk_in_addr < dk_hek_end_ld)
+                    hek_r[(dk_in_addr - dk_ek_end_ld)*8 +: 8] <= dk_in_byte;   // H(ek)
+                else if (dk_in_addr >= dk_hek_end_ld)
+                    z_r[(dk_in_addr - dk_hek_end_ld)*8 +: 8]  <= dk_in_byte;   // z
+            end
             // Drop valid once accepted
             if (sha3_valid && sha3_ready) sha3_valid <= 1'b0;