# NOTE: On some systems, you may need:
#   export LD_PRELOAD=/usr/lib64/libtinfo.so.5
# before running this script.

# xsim_run.tcl - Vivado xsim compilation and simulation script for rng_sync
#
# Compiles rng_sync RTL plus the file-based vector testbench and runs simulation.
# Run from the project root: ~/Dev/mlkem/
#
# Prerequisites:
#   source /opt/Xilinx/Vivado/2019.2/settings64.sh
#
# Usage:
#   vivado -mode batch -source sync_rtl/rng/TB/xsim_run.tcl
#
#   # Or step-by-step:
#   xvlog -sv sync_rtl/rng/rng_sync.v
#   xvlog -sv sync_rtl/rng/TB/tb_rng_xsim.v
#   xelab tb_rng_xsim -s tb_rng_xsim
#   xsim tb_rng_xsim -R

# ================================================================
# Configuration
# ================================================================
set SRC_DIR  sync_rtl/rng
set TB_DIR   sync_rtl/rng/TB

# ================================================================
# Step 1: Compile all source files (xvlog)
# ================================================================
puts "=== Compiling RTL sources ==="

# rng_sync (self-contained, no external dependencies)
xvlog -sv ${SRC_DIR}/rng_sync.v

# ================================================================
# Step 2: Compile testbench
# ================================================================
puts "=== Compiling testbench ==="

# File-based vector testbench
xvlog -sv ${TB_DIR}/tb_rng_xsim.v

# ================================================================
# Step 3: Elaborate snapshot (xelab)
# ================================================================
puts "=== Elaborating snapshot ==="

xelab tb_rng_xsim -s tb_rng_xsim --timescale 1ns/1ps

# ================================================================
# Step 4: Run simulation
# ================================================================
puts "=== Running rng_sync file-based vector test ==="
xsim tb_rng_xsim -R

puts ""
puts "=== rng_sync simulation complete ==="
