initial commit

This commit is contained in:
2026-04-12 22:20:18 +08:00
commit 190c2edbb2
155 changed files with 36314 additions and 0 deletions

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LA32R_GCC := loongarch32r-linux-gnusf-gcc
LA32R_AS := loongarch32r-linux-gnusf-as
LA32R_GXX := loongarch32r-linux-gnusf-g++
LA32R_OBJDUMP := loongarch32r-linux-gnusf-objdump
LA32R_GDB := loongarch32r-linux-gnusf-gdb
LA32R_AR := loongarch32r-linux-gnusf-ar
LA32R_OBJCOPY := loongarch32r-linux-gnusf-objcopy
LA32R_READELF := loongarch32r-linux-gnusf-readelf
.PHONY: all
all: $(TARGET)
#TODO: 根据Cache实际情况调整has_cache宏以在start.S中生成正确的Cache初始化代码
CFLAGS += -Dhas_cache=1
CFLAGS += -Dcache_index_depth=0x100 -Dcache_offset_width=0x4 -Dcache_way=2
CFLAGS += -ffunction-sections -fdata-sections
CFLAGS += -nostartfiles -nostdlib -nostdinc -static -fno-builtin
CFLAGS += -DCLOCKS_PER_SEC=CORE_CLOCKS_PER_SEC -D_CLOCKS_PER_SEC_=CORE_CLOCKS_PER_SEC
CFLAGS += -DUSE_CPU_CLOCK_COUNT
#若使用 newlib , 将下面的 -lsemihost 替换为 -lgloss
LDFLAGS += -T $(LINKER_SCRIPT) \
-Wl,--gc-sections -Wl,--check-sections \
-lc -lm -lg -lsemihost -lgcc -L$(PICOLIBC_DIR)/lib
LINKER_SCRIPT := $(COMMON_DIR)/env/script.lds
ASM_SRCS += $(COMMON_DIR)/env/start.S
ifeq ($(TARGET), RTThread_Nano)
else
ASM_SRCS += $(COMMON_DIR)/env/trap_handler.S
endif
C_SRCS += $(COMMON_DIR)/drivers/confreg_time.c
C_SRCS += $(COMMON_DIR)/drivers/core_time.c
C_SRCS += $(COMMON_DIR)/drivers/common_func.c
C_SRCS += $(COMMON_DIR)/drivers/dvi.c \
$(COMMON_DIR)/drivers/led.c \
$(COMMON_DIR)/drivers/seg7.c
INCLUDES += -I./ \
-I$(COMMON_DIR)/include \
-I$(PICOLIBC_DIR)/include \
-I$(GCC_DIR)/lib/gcc/loongarch32r-linux-gnusf/8.3.0/include \
-I$(GCC_DIR)/lib/gcc/loongarch32r-linux-gnusf/8.3.0/include-fixed
ASM_OBJS := $(ASM_SRCS:.S=.o)
C_OBJS := $(C_SRCS:.c=.o)
LINK_OBJS += $(ASM_OBJS) $(C_OBJS)
LINK_DEPS += $(LINKER_SCRIPT)
CLEAN_OBJS += $(OBJDIR)/$(TARGET).elf $(LINK_OBJS) $(OBJDIR)/$(TARGET).s $(OBJDIR)/$(TARGET).bin $(OBJDIR)/convert $(OBJDIR)/axi_ram.coe $(OBJDIR)/axi_ram.mif $(OBJDIR)/rom.vlog
$(TARGET): $(LINK_OBJS) $(LINK_DEPS) convert Makefile
$(LA32R_GCC) $(CFLAGS) $(INCLUDES) $(LINK_OBJS) -o $(OBJDIR)/$@.elf $(LDFLAGS)
$(LA32R_OBJCOPY) -O binary $(OBJDIR)/$@.elf $(OBJDIR)/$@.bin
$(LA32R_OBJDUMP) --disassemble-all -S $(OBJDIR)/$@.elf > $(OBJDIR)/$@.s
$(OBJDIR)/convert $@.bin $(OBJDIR)/
cp ./$(OBJDIR)/axi_ram.mif $(COMMON_DIR)/../../
cp ./$(OBJDIR)/axi_ram.mif $(LA32RSOC_WINDOWS_HOME)/sdk
cp ./$(OBJDIR)/$@.bin $(COMMON_DIR)/../../
cp ./$(OBJDIR)/$@.bin $(LA32RSOC_WINDOWS_HOME)/sdk
rm -f $(LINK_OBJS)
rm -f $(OBJDIR)/convert
$(ASM_OBJS): %.o: %.S
$(LA32R_GCC) $(CFLAGS) $(INCLUDES) -c -o $@ $<
$(C_OBJS): %.o: %.c
$(LA32R_GCC) $(CFLAGS) $(INCLUDES) -c -o $@ $<
convert: $(COMMON_DIR)/env/convert.c
mkdir -p $(OBJDIR)/
gcc -o $(OBJDIR)/convert $(COMMON_DIR)/env/convert.c
.PHONY: clean
clean:
rm -f $(CLEAN_OBJS)

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#include "common_func.h"
void RegWrite(unsigned int addr,unsigned int var)
{
*((volatile unsigned int *)(addr)) = var;
}
unsigned int RegRead(unsigned int addr)
{
return (*((volatile unsigned int *)(addr)));
}
//memcpy 32bit
void SaveMemory(unsigned int *DestAddr, unsigned int *SrcAddr, unsigned int Size)
{
unsigned int i;
for (i = 0; i < Size; i += 1)
*(U32*)(DestAddr + i) = SrcAddr[i];
}

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#include "confreg_time.h"
#include "time.h"
unsigned long __attribute__((weak)) CONFREG_TIMER_BASE = 0xbf20f100;
unsigned long __attribute__((weak)) CONFREG_CLOCKS_PER_SEC = 50000000L;
unsigned long __attribute__((weak)) CORE_CLOCKS_PER_SEC = 33000000L;
unsigned long get_confreg_clock_count()
{
unsigned long contval;
asm volatile(
"la.local $r25, CONFREG_TIMER_BASE\n\t"
"ld.w $r25, $r25, 0\n\t"
"ld.w %0,$r25,0\n\t"
:"=r"(contval)
:
:"$r25"
);
return contval;
}
unsigned long get_cpu_clock_count()
{
unsigned long contval;
asm volatile(
"rdcntvl.w %0\n\t"
:"=r"(contval)
);
return contval;
}
unsigned long get_clock_count()
{
#ifdef USE_CPU_CLOCK_COUNT
return get_cpu_clock_count();
#else
return get_confreg_clock_count();
#endif
}
unsigned long get_ns(void)
{
unsigned long n=0;
n = get_clock_count();
#ifdef USE_CPU_CLOCK_COUNT
n=n*(NSEC_PER_USEC/(CORE_CLOCKS_PER_SEC/USEC_PER_SEC));
#else
n=n*(NSEC_PER_USEC/(CONFREG_CLOCKS_PER_SEC/USEC_PER_SEC));
#endif
return n;
}
unsigned long get_us(void)
{
unsigned long n=0;
n = get_clock_count();
#ifdef USE_CPU_CLOCK_COUNT
n=n/(CORE_CLOCKS_PER_SEC/USEC_PER_SEC);
#else
n=n/(CONFREG_CLOCKS_PER_SEC/USEC_PER_SEC);
#endif
return n;
}

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#include "core_time.h"
#include "confreg_time.h"
// default : 33 mhz
void delay_ms(uint32_t ms)
{
unsigned char overflow;
unsigned long time,target_time,time_r,target_time_r;
time = get_cpu_clock_count();
time_r = time;
target_time = time + (CORE_CLOCKS_PER_SEC/1000)*ms;
target_time_r = target_time;
if( target_time < time){
overflow = 1;
target_time = 0xffffffff;
}
while(time < target_time){
time = get_cpu_clock_count();
if (time_r > time) break;
time_r = time;
}
if (overflow) {
while( time < target_time_r){
time = get_cpu_clock_count();
}
overflow = 0;
}
}

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#include "dvi.h"
// 设置坐标和颜色的绘图函数
void DVI_Draw_Rect(uint32_t x, uint32_t y, uint32_t l, uint32_t w)
{
// 创建坐标值x 和 y 分别占用 12 位; width 和 height 用于定义范围
uint32_t coordinates = ((x & 0xFFFF)<<16) | (y & 0xFFFF);
uint32_t size = ((l & 0xFFFF)<<16) | (w & 0xFFFF);
// 写入坐标和颜色寄存器
RegWrite(DVI_RECT_DIR, coordinates);
RegWrite(DVI_RECT_L_W, size);
}
// 在指定位置绘制一个点的函数
void DVI_Draw_SQU(uint32_t x, uint32_t y, uint32_t r)
{
// 创建坐标值x 和 y 分别占用 12 位; width 和 height 用于定义范围
uint32_t coordinates = ((x & 0xFFFF)<<16) | (y & 0xFFFF);
uint32_t size = ((r & 0xFFFF)<<16) | (r & 0xFFFF);
// 写入坐标和颜色寄存器
RegWrite(DVI_SQU_DIR, coordinates);
RegWrite(DVI_SQU_R, size);
}

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#include "led.h"
// set leds pin
void setLedPin(uint32_t data)
{
RegWrite(LEDS_GPIO_DATA,data);
}
// toggle one led pin
void toggleLedPin(uint32_t data)
{
uint32_t led_data;
uint32_t process_bit;
led_data = RegRead(LEDS_GPIO_DATA);
process_bit = 0x1 << data;
if(led_data & process_bit)
{
led_data = led_data & (~process_bit);
}
else
{
led_data = led_data | process_bit;
}
RegWrite(LEDS_GPIO_DATA,led_data);
}

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// seg7.c
#include "seg7.h"
void setSegNum(uint32_t seg1,uint32_t num1,uint32_t seg2,uint32_t num2)
{
// select seg
uint32_t select_seg = ((seg1<<2) + seg2);
RegWrite(SEG7_SELECT,select_seg);
// set num
uint32_t num_seg = ((num1<<4) + num2);
RegWrite(SEG7_NUM,num_seg);
}

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sdk/software/bsp/env/convert.c vendored Normal file
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#include <stdio.h>
#include <stdlib.h>
#include <string.h>
void binary_out(FILE* out,unsigned char* mem)
{
char tmp;
unsigned char num[8];
int i;
int j;
num[0] = 1;
num[1] = 2;
num[2] = 4;
num[3] = 8;
num[4] = 16;
num[5] = 32;
num[6] = 64;
num[7] = 128;
for(i=3;i>=0;i--)
{
for(j=7;j>=0;j--)
{
if( (mem[i] & num[j] ) != 0)
tmp = '1';
else
tmp = '0';
fprintf(out,"%c",tmp);
}
}
fprintf(out,"\n");
return;
}
int main(int argc, char** argv)
{
FILE *in;
FILE *out;
if(argc < 3){
fprintf(stderr, "Usage: convert main.bin directory\n");
return 1;
}
char str_bin[256];
char str_coe[256], str_mif[256], str_vlog[256];
strncpy(str_bin, argv[2], 256);
strncpy(str_coe, argv[2], 256);
strncpy(str_mif, argv[2], 256);
strncpy(str_vlog,argv[2], 256);
strncat(str_bin, argv[1], 255);
strncat(str_coe, "axi_ram.coe", 255);
strncat(str_mif, "axi_ram.mif", 255);
strncat(str_vlog,"rom.vlog" , 255);
//printf("%s\n%s\n%s\n%s\n%s\n%s\n", str_bin, str_data, str_inst_coe, str_inst_mif, str_data_coe, str_data_mif);
int i,j,k;
unsigned char mem[32];
in = fopen(str_bin, "rb");
out = fopen(str_coe,"w");
fprintf(out, "memory_initialization_radix = 16;\n");
fprintf(out, "memory_initialization_vector =\n");
while(!feof(in)) {
if(fread(mem,1,4,in)!=4) {
fprintf(out, "%02x%02x%02x%02x\n", mem[3], mem[2], mem[1], mem[0]);
break;
}
fprintf(out, "%02x%02x%02x%02x\n", mem[3], mem[2], mem[1],mem[0]);
}
fclose(in);
fclose(out);
in = fopen(str_bin, "rb");
out = fopen(str_mif,"w");
while(!feof(in)) {
if(fread(mem,1,4,in)!=4) {
binary_out(out,mem);
break;
}
binary_out(out,mem);
}
fclose(in);
fclose(out);
in = fopen(str_bin, "rb");
out = fopen(str_vlog,"w");
fprintf(out,"@1c000000\n");
while(!feof(in)) {
if (fread(mem,1,1,in) != 1) {
fprintf(out,"%02x\n", mem[0]);
break;
}
fprintf(out,"%02x\n", mem[0]);
}
fclose(in);
fclose(out);
return 0;
}

182
sdk/software/bsp/env/script.lds vendored Normal file
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OUTPUT_ARCH(loongarch)
ENTRY(_start)
MEMORY
{
isram (rwxai) : ORIGIN = 0x1c000000, LENGTH = 512K
dsram (rwxai) : ORIGIN = 0x1c080000, LENGTH = 512K
}
SECTIONS
{
__stack_size = DEFINED(__stack_size) ? __stack_size : 64K;
.init :
{
KEEP (*(SORT_NONE(.init)))
} >isram AT>isram
.ilalign :
{
. = ALIGN(16);
PROVIDE( _isram_lma = . );
} >isram AT>isram
.ialign :
{
PROVIDE( _isram = . );
} >isram AT>isram
.text :
{
_ftext = . ;
*(.text.unlikely .text.unlikely.*)
*(.text.startup .text.startup.*)
*(.text .text.*)
*(.gnu.linkonce.t.*)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
/* section information for utest */
. = ALIGN(4);
__rt_utest_tc_tab_start = .;
KEEP(*(UtestTcTab))
__rt_utest_tc_tab_end = .;
/* section information for at server */
. = ALIGN(4);
__rtatcmdtab_start = .;
KEEP(*(RtAtCmdTab))
__rtatcmdtab_end = .;
. = ALIGN(4);
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
} >isram AT>isram
.fini :
{
KEEP (*(SORT_NONE(.fini)))
} >isram AT>isram
. = ALIGN(16);
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >isram AT>isram
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
PROVIDE_HIDDEN (__init_array_end = .);
} >isram AT>isram
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
PROVIDE_HIDDEN (__fini_array_end = .);
} >isram AT>isram
.ctors :
{
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >isram AT>isram
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >isram AT>isram
. = ALIGN(16);
.ex_table_base :
{
_ex_table_base_start = .;
. = 0x500;
_ex_table_base_end = .;
} >isram AT>isram
. = ALIGN(16);
PROVIDE( _eisram = . );
.lalign :
{
. = ALIGN(16);
PROVIDE( _data_lma = . );
} >isram AT>isram
.dalign :
{
. = ALIGN(16);
PROVIDE( _data = . );
} >dsram AT>isram
.data :
{
*(.rdata)
*(.rodata .rodata.*)
rodata_end = .;
*(.gnu.linkonce.r.*)
*(.data .data.*)
*(.gnu.linkonce.d.*)
. = ALIGN(16);
PROVIDE( __global_pointer$ = . + 0x800 );
*(.sdata .sdata.*)
*(.gnu.linkonce.s.*)
. = ALIGN(16);
*(.srodata.cst16)
*(.srodata.cst8)
*(.srodata.cst4)
*(.srodata.cst2)
*(.srodata .srodata.*)
} >dsram AT>isram
. = ALIGN(16);
PROVIDE( _edata = . );
PROVIDE( edata = . );
PROVIDE( _fbss = . );
.bss :
{
PROVIDE( __bss_start = . );
*(.sbss*)
*(.sbss.*)
*(.dynsbss)
*(.scommon)
*(.bss)
*(.bss.*)
*(.dynbss)
*(.gnu.linkonce.sb.*)
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(16);
} >dsram AT>dsram
. = ALIGN(16);
PROVIDE( _end = . );
PROVIDE( end = . );
PROVIDE (__heap_start = _end);
.stack ORIGIN(dsram) + LENGTH(dsram) - __stack_size :
{
PROVIDE( _heap_end = . );
PROVIDE (__heap_end = _heap_end);
PROVIDE (__heap_size = __heap_end - __heap_start);
. = __stack_size;
PROVIDE( _stack = . );
} >dsram AT>dsram
}

182
sdk/software/bsp/env/start.S vendored Normal file
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#include "regdef.h"
#include "uart_print.h"
#include "handler.h"
.extern UART_BASE
.section .init
.globl _start
.type _start,@function
_start:
##init regs
addi.w $r1,zero,0x0; addi.w $r2,zero,0x0; addi.w $r3,zero,0x0; addi.w $r4,zero,0x0;
addi.w $r5,zero,0x0; addi.w $r6,zero,0x0; addi.w $r7,zero,0x0; addi.w $r8,zero,0x0;
addi.w $r9,zero,0x0; addi.w $r10,zero,0x0; addi.w $r11,zero,0x0; addi.w $r12,zero,0x0;
addi.w $r13,zero,0x0; addi.w $r14,zero,0x0; addi.w $r15,zero,0x0; addi.w $r16,zero,0x0;
addi.w $r17,zero,0x0; addi.w $r18,zero,0x0; addi.w $r19,zero,0x0; addi.w $r20,zero,0x0;
addi.w $r21,zero,0x0; addi.w $r22,zero,0x0; addi.w $r23,zero,0x0; addi.w $r24,zero,0x0;
addi.w $r25,zero,0x0; addi.w $r26,zero,0x0; addi.w $r27,zero,0x0; addi.w $r28,zero,0x0;
addi.w $r29,zero,0x0; addi.w $r30,zero,0x0; addi.w $r31,zero,0x0;
#if has_cache==1
# invalid the old inst in icache and old data in dcache by index
li.w t0,0x0
#li.w t2,0x100
li.w t2, cache_index_depth
1:
#slli.w t1, t0, 0x4
slli.w t1, t0, cache_offset_width
#if cache_way==1
cacop 0x00, t1, 0x0
cacop 0x01, t1, 0x0
#elif cache_way==2
cacop 0x00, t1, 0x0
cacop 0x00, t1, 0x1
cacop 0x01, t1, 0x0
cacop 0x01, t1, 0x1
#elif cache_way==4
cacop 0x00, t1, 0x0
cacop 0x00, t1, 0x1
cacop 0x00, t1, 0x2
cacop 0x00, t1, 0x3
cacop 0x01, t1, 0x0
cacop 0x01, t1, 0x1
cacop 0x01, t1, 0x2
cacop 0x01, t1, 0x3
#endif
addi.w t0, t0, 0x1
bne t0, t2, 1b
#else
/* disable cache */
li.w $r12,0x1
csrwr $r12,0x101
#endif
/* open da mode */
li.w $r12,0x8
li.w $r13,0x18
csrxchg $r12,$r13,0x0
/* init dmw */
csrwr $r0,0x180
csrwr $r0,0x181
li.w $r12,0x09
csrwr $r12,0x180
li.w $r12,0xa0000009
csrwr $r12,0x181
/* open pg mode */
li.w $r12,0x10
li.w $r13,0x18
csrxchg $r12,$r13,0x0
/* load data section */
la.local t0, _data_lma
la.local t1, _data
la.local t2, _edata
bgeu t1, t2, 2f
1:
ld.w t3, t0, 0
st.w t3, t1, 0
addi.w t0, t0, 4
addi.w t1, t1, 4
bltu t1, t2, 1b
2:
/* clear bss section */
la.local t0, __bss_start
la.local t1, _end
bgeu t0, t1, 2f
1:
st.w $r0, t0, 0
addi.w t0, t0, 4
bltu t0, t1, 1b
2:
/* enable cache */
#if has_cache==1
li.w $r12,0x19
csrwr $r12,0x180
#else
#endif
/* init UART */
la.local t0, UART_BASE
ld.w t1, t0, 0
#WRITE(li.wne,OFS_FIFO,FIFO_ENABLE|FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_0);
li.w t2, 0x07
st.b t2, t1, 2
#WRITE(li.wne,OFS_LINE_CONTROL, 0x80);
li.w t2, 0x80
st.b t2, t1, 3
#WRITE(li.wne,OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
li.w t2, 0x00
st.b t2, t1, 1
#WRITE(li.wne,OFS_DIVISOR_LSB, divisor & 0xff);
li.w t3, 0xbf20f500
ld.w t3, t3, 0
li.w t2, 0x1b
beq zero, t3, 1f
li.w t2, 0x1
1:
st.b t2, t1, 0
#WRITE(li.wne,OFS_DATA_FORMAT, data | parity | stop);
li.w t2, 0x3
st.b t2, t1, 3
#WRITE(li.wne,OFS_MODEM_CONTROL,0);
li.w t2, 0x0
st.b t2, t1, 4
/* init exception */
#ifdef RTThread
la.local t0, rtthread_irq_entry
#else
la.local t0, trap_handler
#endif
csrwr t0, csr_eentry
#clear int
li.w t1, 0x1
csrwr t1, csr_ticlr
#enable int
li.w t1, 0x4
#ifdef RTThread
csrxchg zero, t1, csr_crmd
#else
csrxchg t1, t1, csr_crmd
#endif
csrwr zero, csr_prmd
li.w t1, 0x1fff
csrwr zero, csr_ecfg
csrwr t1, csr_ecfg
la.local sp, _stack
/* argc = argv = 0 */
li.w a0, 0
li.w a1, 0
#ifdef RTThread
bl entry
#else
bl main
#endif
/*tail exit*/
bl _myexit
1:
b 1b
.globl _myexit
.org 0x200
_myexit:
1:
b 1b

188
sdk/software/bsp/env/trap_handler.S vendored Normal file
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#include "regdef.h"
.macro TRAP_ENTRY_SETJMP
addi.w sp, sp, -124
st.w ra, sp, 120
st.w tp, sp, 116
st.w sp, sp, 112
st.w a0, sp, 108
st.w a1, sp, 104
st.w a2, sp, 100
st.w a3, sp, 96
st.w a4, sp, 92
st.w a5, sp, 88
st.w a6, sp, 84
st.w a7, sp, 80
st.w t0, sp, 76
st.w t1, sp, 72
st.w t2, sp, 68
st.w t3, sp, 64
st.w t4, sp, 60
st.w t5, sp, 56
st.w t6, sp, 52
st.w t7, sp, 48
st.w t8, sp, 44
st.w $r21, sp,40
st.w fp, sp, 36
st.w s0, sp, 32
st.w s1, sp, 28
st.w s2, sp, 24
st.w s3, sp, 20
st.w s4, sp, 16
st.w s5, sp, 12
st.w s6, sp, 8
st.w s7, sp, 4
st.w s8, sp, 0
.endm
.macro TRAP_EXIT_LONGJMP
ld.w ra, sp, 120
ld.w tp, sp, 116
ld.w sp, sp, 112
ld.w a0, sp, 108
ld.w a1, sp, 104
ld.w a2, sp, 100
ld.w a3, sp, 96
ld.w a4, sp, 92
ld.w a5, sp, 88
ld.w a6, sp, 84
ld.w a7, sp, 80
ld.w t0, sp, 76
ld.w t1, sp, 72
ld.w t2, sp, 68
ld.w t3, sp, 64
ld.w t4, sp, 60
ld.w t5, sp, 56
ld.w t6, sp, 52
ld.w t7, sp, 48
ld.w t8, sp, 44
ld.w $r21, sp,40
ld.w fp, sp, 36
ld.w s0, sp, 32
ld.w s1, sp, 28
ld.w s2, sp, 24
ld.w s3, sp, 20
ld.w s4, sp, 16
ld.w s5, sp, 12
ld.w s6, sp, 8
ld.w s7, sp, 4
ld.w s8, sp, 0
addi.w sp, sp, 124
ertn
.endm
.section .text
.align 6
.global trap_handler
.weak trap_handler
trap_handler:
TRAP_ENTRY_SETJMP
csrrd a0, csr_estat
csrrd a1, csr_era
srli.w t0, a0, 16
bne zero, t0, is_exceptions
andi t0, a0, 0x3FC
srli.w t1, t0, 2
# priority
move t2, t1
andi t2, t2, 0x1
li.w t8, 0x1
beq t2, t8, handle_hwi0
move t2, t1
andi t2, t2, 0x2
li.w t8, 0x2
beq t2, t8, handle_hwi1
move t2, t1
andi t2, t2, 0x4
li.w t8, 0x4
beq t2, t8, handle_hwi2
move t2, t1
andi t2, t2, 0x8
li.w t8, 0x8
beq t2, t8, handle_hwi3
move t2, t1
andi t2, t2, 0x10
li.w t8, 0x10
beq t2, t8, handle_hwi4
move t2, t1
andi t2, t2, 0x20
li.w t8, 0x20
beq t2, t8, handle_hwi5
move t2, t1
andi t2, t2, 0x40
li.w t8, 0x40
beq t2, t8, handle_hwi6
move t2, t1
andi t2, t2, 0x80
li.w t8, 0x80
beq t2, t8, handle_hwi7
b trap_jump_exit
is_exceptions:
addi.w t8, a1, 4
csrwr t8, csr_era
1:
b 1b
trap_jump_exit:
TRAP_EXIT_LONGJMP
# HWI0
handle_hwi0:
bl HWI0_IntrHandler
b trap_jump_exit
# HWI1
handle_hwi1:
b trap_jump_exit
# HWI2
handle_hwi2:
b trap_jump_exit
# HWI3
handle_hwi3:
b trap_jump_exit
# HWI4
handle_hwi4:
b trap_jump_exit
# HWI5
handle_hwi5:
b trap_jump_exit
# HWI6
handle_hwi6:
b trap_jump_exit
# HWI7
handle_hwi7:
b trap_jump_exit
.weak HWI0_IntrHandler
HWI0_IntrHandler:
1:
b 1b

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#ifndef common_func_H
#define common_func_H
#include <larchintrin.h>
typedef signed int S32;
typedef unsigned int U32;
typedef unsigned int uint32_t;
typedef signed short S16;
typedef unsigned short U16;
typedef signed char S8;
typedef unsigned char U8;
typedef long long S64;
typedef unsigned long long U64;
void RegWrite(unsigned int addr,unsigned int var);
unsigned int RegRead(unsigned int addr);
void SaveMemory(unsigned int *DestAddr, unsigned int *SrcAddr, unsigned int Size);
static inline U32 csr_readl(U32 reg)
{
return __csrrd_w(reg);
}
static inline U64 csr_readq(U32 reg)
{
return __csrrd_w(reg);
}
static inline void csr_writel(U32 val, U32 reg)
{
__csrwr_w(val, reg);
}
static inline void csr_writeq(U64 val, U32 reg)
{
__csrwr_w(val, reg);
}
static inline U32 csr_xchgl(U32 val, U32 mask, U32 reg)
{
return __csrxchg_w(val, mask, reg);
}
static inline U64 csr_xchgq(U64 val, U64 mask, U32 reg)
{
return __csrxchg_w(val, mask, reg);
}
#define CacheOp_Cache 0x03
#define CacheOp_Op 0x1c
#define Cache_I 0x00
#define Cache_D 0x01
#define Cache_V 0x02
#define Cache_S 0x03
#define Index_Invalidate 0x08
#define Index_Writeback_Inv 0x08
#define Hit_Invalidate 0x10
#define Hit_Writeback_Inv 0x10
#define Index_Invalidate_I (Cache_I | Index_Invalidate)
#define Index_Writeback_Inv_D (Cache_D | Index_Writeback_Inv)
#define Hit_Invalidate_I (Cache_I | Hit_Invalidate)
#define Hit_Writeback_Inv_D (Cache_D | Hit_Writeback_Inv)
#define cache_op(op, addr) \
__asm__ __volatile__( \
" cacop %0, %1 \n" \
: \
: "i" (op), "R" (*(unsigned char *)(addr)))
static inline void flush_icache_line_indexed(unsigned long addr)
{
cache_op(Index_Invalidate_I, addr);
}
static inline void flush_dcache_line_indexed(unsigned long addr)
{
cache_op(Index_Writeback_Inv_D, addr);
}
static inline void flush_icache_line(unsigned long addr)
{
cache_op(Hit_Invalidate_I, addr);
}
static inline void flush_dcache_line(unsigned long addr)
{
cache_op(Hit_Writeback_Inv_D, addr);
}
static inline void init_dcache_line(unsigned long addr)
{
cache_op(0x01, addr);
}
#endif

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#ifndef _CONFREG_TIME_H_H
#define _CONFREG_TIME_H_H
extern unsigned long CONFREG_TIMER_BASE;
extern unsigned long CONFREG_CLOCKS_PER_SEC;
extern unsigned long CORE_CLOCKS_PER_SEC;
#define MSEC_PER_SEC 1000L
#define USEC_PER_MSEC 1000L
#define NSEC_PER_USEC 1000L
#define NSEC_PER_MSCEC 1000000L
#define USEC_PER_SEC 1000000L
#define NSEC_PER_SEC 1000000000L
#define FSEC_PER_SEC 1000000000000000LL
unsigned long get_cpu_clock_count();//获取处理器核统计的时钟周期数
unsigned long get_confreg_clock_count();//获取CONFREG的时钟周期数
unsigned long get_clock_count();//根据是否存在宏 USE_CPU_CLOCK_COUNT 输出 处理器核/CONFREG 的计数器值
unsigned long get_ns(void);//获取统计的纳秒数
unsigned long get_us(void);//获取统计的微秒数
#endif

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#ifndef CORE_TIME_H
#define CORE_TIME_H
#include "common_func.h"
void delay_ms(uint32_t ms);
#endif

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#ifndef DVI_H
#define DVI_H
#include "common_func.h"
#define DVI_BASEADDR 0xbf100000
#define DVI_RECT_DIR (DVI_BASEADDR + 0x0)
#define DVI_RECT_L_W (DVI_BASEADDR + 0x4)
#define DVI_SQU_DIR (DVI_BASEADDR + 0x8)
#define DVI_SQU_R (DVI_BASEADDR + 0xC)
// draw rect on DVI to x y
void DVI_Draw_Rect(uint32_t x, uint32_t y, uint32_t l, uint32_t w);
// draw squ on DVI to x y r
void DVI_Draw_SQU(uint32_t x, uint32_t y, uint32_t r);
#endif // DVI

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#ifndef _HANDLER_H
#define _HANDLER_H
#define ex_tlb_load_present_type 0x1
#define ex_tlb_store_present_type 0x2
#define ex_tlb_fetch_present_type 0x3
#define ex_tlb_modify_type 0x4
#define ex_tlb_read_inhibit_type 0x5
#define ex_tlb_execute_inhibit_type 0x6
#define ex_tlb_privilege_error_type 0x7
#define ex_ade_type 0x8
#define ex_align_check_type 0x9
#define ex_bound_check_error_type 0xa
#define ex_syscall_type 0xb
#define ex_break_type 0xc
#define ex_ri_type 0xd
#define ex_previlege_inst_type 0xe
#define ex_fpe_disable_type 0xf
#define ex_lsx_disable_type 0x10
#define ex_lasx_disable_type 0x11
#define ex_fpe_type 0x12
#define ex_watch_type 0x13
#define ex_bt_disable_type 0x14
#define ex_bt_help_type 0x15
#define ex_psi_type 0x16
#define ex_hypcall_type 0x17
#define ex_field_change_type 0x18
#define ex_sate_related_type 0x19
#define ex_tlb_refill 0x3f
#endif

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#ifndef LED_H
#define LED_H
#include "common_func.h"
#define LEDS_BASEADDR 0xbf20f300
#define LEDS_GPIO_DATA (LEDS_BASEADDR + 0x00)
// set leds pin
void setLedPin(uint32_t data);
void toggleLedPin(uint32_t data);
#endif

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#ifndef _SYS_REGDEF_H
#define _SYS_REGDEF_H
# define zero $r0
# define ra $r1
# define tp $r2
# define sp $r3
# define a0 $r4
# define a1 $r5
# define a2 $r6
# define a3 $r7
# define a4 $r8
# define a5 $r9
# define a6 $r10
# define a7 $r11
# define v0 $r4
# define v1 $r5
# define t0 $r12
# define t1 $r13
# define t2 $r14
# define t3 $r15
# define t4 $r16
# define t5 $r17
# define t6 $r18
# define t7 $r19
# define t8 $r20
# define x $r21
# define fp $r22
# define s0 $r23
# define s1 $r24
# define s2 $r25
# define s3 $r26
# define s4 $r27
# define s5 $r28
# define s6 $r29
# define s7 $r30
# define s8 $r31
# define fa0 $f0
# define fa1 $f1
# define fa2 $f2
# define fa3 $f3
# define fa4 $f4
# define fa5 $f5
# define fa6 $f6
# define fa7 $f7
# define fv0 $f0
# define fv1 $f1
# define ft0 $f8
# define ft1 $f9
# define ft2 $f10
# define ft3 $f11
# define ft4 $f12
# define ft5 $f13
# define ft6 $f14
# define ft7 $f15
# define ft8 $f16
# define ft9 $f17
# define ft10 $f18
# define ft11 $f19
# define ft12 $f20
# define ft13 $f21
# define ft14 $f22
# define ft15 $f23
# define fs0 $f24
# define fs1 $f25
# define fs2 $f26
# define fs3 $f27
# define fs4 $f28
# define fs5 $f29
# define fs6 $f30
# define fs7 $f31
#define csr_crmd 0x0
#define csr_prmd 0x1
#define csr_euen 0x2
#define csr_ecfg 0x4
#define csr_estat 0x5
#define csr_era 0x6
#define csr_badv 0x7
#define csr_eentry 0xc
#define csr_tlbidx 0x10
#define csr_tlbehi 0x11
#define csr_tlbelo0 0x12
#define csr_tlbelo1 0x13
#define csr_asid 0x18
#define csr_pgdl 0x19
#define csr_pgdh 0x1a
#define csr_pgd 0x1b
#define csr_cpuid 0x20
#define csr_save0 0x30
#define csr_save1 0x31
#define csr_save2 0x32
#define csr_save3 0x33
#define csr_tid 0x40
#define csr_tcfg 0x41
#define csr_tval 0x42
#define csr_ticlr 0x44
#define csr_llbctl 0x60
#define csr_tlbrentry 0x88
#define csr_dmw0 0x180
#define csr_dmw1 0x181
#endif

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// seg7.h
#ifndef SEG7_H
#define SEG7_H
#include "common_func.h"
#define SEG7_BASEADDR 0xbf20f200
#define SEG7_SELECT (SEG7_BASEADDR + 0x00)
#define SEG7_NUM (SEG7_BASEADDR + 0x04)
// set seg num
void setSegNum(uint32_t seg1,uint32_t num1,uint32_t seg2,uint32_t num2);
#endif

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#ifndef _UART_PRINT_H
#define _UART_PRINT_H
#define UART_PRINT(str)\
la a0, 1f;\
.section .rodata ;\
1: ;\
.asciz str ;\
.section .init ;\
bl %plt(puts)
#endif