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rtl/config.h

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+/*------------------------------------------------------------------------------
+--------------------------------------------------------------------------------
+Copyright (c) 2016, Loongson Technology Corporation Limited.
+
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this 
+list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright notice, 
+this list of conditions and the following disclaimer in the documentation and/or
+other materials provided with the distribution.
+
+3. Neither the name of Loongson Technology Corporation Limited nor the names of 
+its contributors may be used to endorse or promote products derived from this 
+software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 
+ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
+DISCLAIMED. IN NO EVENT SHALL LOONGSON TECHNOLOGY CORPORATION LIMITED BE LIABLE
+TO ANY PARTY FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 
+GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
+THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+--------------------------------------------------------------------------------
+------------------------------------------------------------------------------*/
+
+`define SRAM_Init_File "../../../../../../sdk/axi_ram.mif"
+
+`define USE_CACHE
+
+`define Lawcmd 4
+`define Lawdirqid 4
+`define Lawstate 2
+`define Lawscseti 2
+`define Lawid 4
+`define Lawaddr 32 
+`define Lawlen 8
+`define Lawsize 3
+`define Lawburst 2
+`define Lawlock 2
+`define Lawcache 4
+`define Lawprot 3
+`define Lawvalid 1
+`define Lawready 1
+`define Lwid 4
+`define Lwdata 32
+`define Lwstrb 4
+`define Lwlast 1
+`define Lwvalid 1
+`define Lwready 1
+`define Lbid 4
+`define Lbresp 2
+`define Lbvalid 1
+`define Lbready 1
+`define Larcmd 4
+`define Larcpuno 10
+`define Larid 4
+`define Laraddr 32
+`define Larlen 8
+`define Larsize 3
+`define Larburst 2
+`define Larlock 2
+`define Larcache 4
+`define Larprot 3
+`define Larvalid 1
+`define Larready 1
+`define Lrstate 2
+`define Lrscseti 2
+`define Lrid 4
+`define Lrdata 32
+`define Lrresp 2
+`define Lrlast 1
+`define Lrvalid 1
+`define Lrready 1
+`define Lrrequest 1
+
+`define LID 4
+`define LADDR 32
+`define LLEN 8
+`define LSIZE 3
+`define LDATA 32
+`define LSTRB 4
+`define LBURST 2
+`define LLOCK 2
+`define LCACHE 4
+`define LPROT 3
+`define LRESP 2