47 lines
1.3 KiB
Tcl
47 lines
1.3 KiB
Tcl
# Force a clean implementation and generate the bitstream used by board tests.
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set script_dir [file dirname [file normalize [info script]]]
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set repo_root [file normalize [file join $script_dir ../../../..]]
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set xpr [file join $repo_root fpga project Loongson_Soc.xpr]
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set dsp_report [file join $repo_root fpga project dsp_utilization.rpt]
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if {![file exists $xpr]} {
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puts stderr "ERROR: project not found: $xpr"
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exit 2
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}
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open_project $xpr
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reset_run synth_1
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launch_runs synth_1
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wait_on_run synth_1
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set synth_run [get_runs synth_1]
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set synth_progress [get_property PROGRESS $synth_run]
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set synth_status [get_property STATUS $synth_run]
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puts "synth_1 progress: $synth_progress"
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puts "synth_1 status: $synth_status"
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if {$synth_progress ne "100%" || [string first "ERROR" [string toupper $synth_status]] >= 0} {
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puts stderr "ERROR: fresh synthesis failed"
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close_project
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exit 3
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}
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launch_runs impl_1 -to_step write_bitstream
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wait_on_run impl_1
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set run [get_runs impl_1]
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set progress [get_property PROGRESS $run]
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set status [get_property STATUS $run]
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puts "impl_1 progress: $progress"
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puts "impl_1 status: $status"
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if {$progress ne "100%" || [string first "ERROR" [string toupper $status]] >= 0} {
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puts stderr "ERROR: fresh implementation failed"
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close_project
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exit 4
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}
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open_run impl_1
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report_utilization -file $dsp_report
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close_project
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exit 0
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