FallenSigh
e35fa5884d
The open-la500 core has USE_CACHE enabled. Writes to 0x1c400000 go to the write-back data cache and never reach the SRAM model before the testbench checks ExtRAM. Use the 0xA0000000 uncached segment (same pattern as fft_dma/main.c).
37 lines
1.2 KiB
C
37 lines
1.2 KiB
C
#include "dma.h"
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void dma_start_transfer(int ch_id, uint32_t src, uint32_t dst, uint32_t bytes, uint32_t tag) {
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volatile dma_ch_regs_t* ch = DMA_CH(ch_id);
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// 检查通道是否空闲 防止覆盖正在运行的任务
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if (ch->STATUS & STATUS_BUSY_BIT) {
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// printf("channel %d busy\n", ch_id);
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return; // 通道正忙，处理报错或重试
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}
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// 写入基本地址和长度
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ch->SRC_ADDR = src;
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ch->DST_ADDR = dst;
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ch->LENGTH = bytes;
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ch->TAG = tag; // 可选，填入任务ID
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// 置 Burst 属性并触发传输
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// AXI SIZE: 2 (代表 2^2 = 4 Bytes，与 32-bit 数据线匹配)
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// AXI LEN: 15 (代表 16 beats 突发传输，最高效)
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uint32_t ctrl_val = CTRL_BURST_SIZE(2) | CTRL_BURST_LEN(15);
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// 写入 CTRL 并拉高 Bit 0 (Start)
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ch->CTRL = ctrl_val | CTRL_START_BIT;
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}
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void dma_wait_polling(int ch_id) {
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volatile dma_ch_regs_t* ch = DMA_CH(ch_id);
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// 死等 Done bit 置 1
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while (!(ch->STATUS & STATUS_DONE_BIT)) {
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}
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// 清除 Done 标志位 (Write 1 to Clear Bit 1)
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// 注意：写 1 清 0 的设计，所以我们对 bit 1 写入 1
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ch->STATUS = STATUS_DONE_BIT;
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} |