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FallenSigh ed2876b3a8 Pipeline external SRAM reads

2026-07-02 00:23:57 +08:00

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ip

Pipeline external SRAM reads

2026-07-02 00:23:57 +08:00

config.h

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

soc_top.v

Add matmul AXI master path

2026-07-01 23:13:28 +08:00