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ciciec2026/sdk/software/examples/asm/dma.h
FallenSigh 52e85aa6fb perf: drop stdint.h + picolibc — zero libc dependency
dma.h: typedef u32 instead of uint32_t, no stdint.h include
dma.c: use u32 instead of uint32_t
user-sample.c: unsigned char/int instead of uint8_t/uint32_t

Makefile: filter-out -lc -lm -lg -lsemihost from LDFLAGS
  → picolibc .data section (2.1KB, 532 words) eliminated
  → startup data-copy loop: ~30000 → ~200 cycles
  → total start.S latency: ~44000 → ~14000 cycles (~0.42ms at 33MHz)
2026-06-26 22:34:26 +08:00

29 lines
1.1 KiB
C

#pragma once
typedef unsigned int u32;
typedef struct {
volatile u32 SRC_ADDR; // 0x00: source address
volatile u32 DST_ADDR; // 0x04: destination address
volatile u32 LENGTH; // 0x08: transfer byte count
volatile u32 TAG; // 0x0C: software tag (ignored by HW)
volatile u32 CTRL; // 0x10: control (burst config + start)
volatile u32 STATUS; // 0x14: status (busy, done)
volatile u32 RESV[10]; // 0x18 ~ 0x3C: padding to 0x40 bytes
} dma_ch_regs_t;
// DMA 控制器基地址
#define CDMA_MUX_BASE 0xbf300000
#define DMA_CH(i) ((volatile dma_ch_regs_t*)(CDMA_MUX_BASE + (i) * 0x40))
// CTRL 寄存器位定义
#define CTRL_START_BIT (1 << 0)
#define CTRL_BURST_SIZE(x) (((x) & 0x7) << 3) // Bits [5:3]: AXI AxSIZE (0=1B, 1=2B, 2=4B, 3=8B)
#define CTRL_BURST_LEN(x) (((x) & 0xFF) << 6) // Bits [13:6]: AXI AxLEN (0=1 beat, 15=16 beats)
// STATUS 寄存器位定义
#define STATUS_BUSY_BIT (1 << 0)
#define STATUS_DONE_BIT (1 << 1)
void dma_start_transfer(int ch_id, u32 src, u32 dst, u32 bytes, u32 tag);
void dma_wait_polling(int ch_id);